<feed xmlns='http://www.w3.org/2005/Atom'>
<title>user/sven/linux.git/drivers, branch v6.12.11</title>
<subtitle>Linux Kernel
</subtitle>
<id>https://git.stealer.net/cgit.cgi/user/sven/linux.git/atom?h=v6.12.11</id>
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<updated>2025-01-23T16:23:05Z</updated>
<entry>
<title>drm/amd/display: Validate mdoe under MST LCT=1 case as well</title>
<updated>2025-01-23T16:23:05Z</updated>
<author>
<name>Wayne Lin</name>
<email>Wayne.Lin@amd.com</email>
</author>
<published>2024-12-10T03:17:55Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=35c2f2a46ae58cca1b91fb22c924c4a693bd0f30'/>
<id>urn:sha1:35c2f2a46ae58cca1b91fb22c924c4a693bd0f30</id>
<content type='text'>
commit b5cd418f016fb801be413fd52fe4711d2d13018c upstream.

[Why &amp; How]
Currently in dm_dp_mst_is_port_support_mode(), when valdidating mode
under dsc decoding at the last DP link config, we only validate the
case when there is an UFP. However, if the MSTB LCT=1, there is no
UFP.

Under this case, use root_link_bw_in_kbps as the available bw to
compare.

Link: https://gitlab.freedesktop.org/drm/amd/-/issues/3720
Fixes: fa57924c76d9 ("drm/amd/display: Refactor function dm_dp_mst_is_port_support_mode()")
Cc: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
Cc: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Reviewed-by: Jerry Zuo &lt;jerry.zuo@amd.com&gt;
Signed-off-by: Wayne Lin &lt;Wayne.Lin@amd.com&gt;
Signed-off-by: Tom Chung &lt;chiahsuan.chung@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
(cherry picked from commit a04d9534a8a75b2806c5321c387be450c364b55e)
Cc: stable@vger.kernel.org
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>Revert "drm/amd/display: Enable urgent latency adjustments for DCN35"</title>
<updated>2025-01-23T16:23:05Z</updated>
<author>
<name>Nicholas Susanto</name>
<email>Nicholas.Susanto@amd.com</email>
</author>
<published>2024-12-19T19:15:37Z</published>
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<id>urn:sha1:ec744819bdd45ad3ae0f2cd284ae8ae86051c722</id>
<content type='text'>
commit 3412860cc4c0c484f53f91b371483e6e4440c3e5 upstream.

Revert commit 284f141f5ce5 ("drm/amd/display: Enable urgent latency adjustments for DCN35")

[Why &amp; How]

Urgent latency increase caused  2.8K OLED monitor caused it to
block this panel support P0.

Reverting this change does not reintroduce the netflix corruption issue
which it fixed.

Fixes: 284f141f5ce5 ("drm/amd/display: Enable urgent latency adjustments for DCN35")
Reviewed-by: Charlene Liu &lt;charlene.liu@amd.com&gt;
Signed-off-by: Nicholas Susanto &lt;Nicholas.Susanto@amd.com&gt;
Signed-off-by: Tom Chung &lt;chiahsuan.chung@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
(cherry picked from commit c7ccfc0d4241a834c25a9a9e1e78b388b4445d23)
Cc: stable@vger.kernel.org
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Do not wait for PSR disable on vbl enable</title>
<updated>2025-01-23T16:23:05Z</updated>
<author>
<name>Leo Li</name>
<email>sunpeng.li@amd.com</email>
</author>
<published>2024-12-09T17:58:33Z</published>
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<id>urn:sha1:f6be6248d6490be9d9e476d4036e77bf42e3c10e</id>
<content type='text'>
commit ff2e4d874726c549130308b6b46aa0f8a34e04cb upstream.

[Why]

Outside of a modeset/link configuration change, we should not have to
wait for the panel to exit PSR. Depending on the panel and it's state,
it may take multiple frames for it to exit PSR. Therefore, waiting in
all scenarios may cause perceived stuttering, especially in combination
with faster vblank shutdown.

[How]

PSR1 disable is hooked up to the vblank enable event, and vice versa. In
case of vblank enable, do not wait for panel to exit PSR, but still wait
in all other cases.

We also avoid a call to unnecessarily change power_opts on disable -
this ends up sending another command to dmcub fw.

When testing against IGT, some crc tests like kms_plane_alpha_blend and
amd_hotplug were failing due to CRC timeouts. This was found to be
caused by the early return before HW has fully exited PSR1. Fix this by
first making sure we grab a vblank reference, then waiting for panel to
exit PSR1, before programming hw for CRC generation.

Fixes: 58a261bfc967 ("drm/amd/display: use a more lax vblank enable policy for older ASICs")
Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/3743
Reviewed-by: Tom Chung &lt;chiahsuan.chung@amd.com&gt;
Signed-off-by: Leo Li &lt;sunpeng.li@amd.com&gt;
Signed-off-by: Tom Chung &lt;chiahsuan.chung@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
(cherry picked from commit aa6713fa2046f4c09bf3013dd1420ae15603ca6f)
Cc: stable@vger.kernel.org
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Disable replay and psr while VRR is enabled</title>
<updated>2025-01-23T16:23:04Z</updated>
<author>
<name>Tom Chung</name>
<email>chiahsuan.chung@amd.com</email>
</author>
<published>2024-12-05T15:20:45Z</published>
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<id>urn:sha1:0f0c5ca1863e0cc7fe32ada6e78ac781be8ff377</id>
<content type='text'>
commit 67edb81d6e9af43a0d58edf74630f82cfda4155d upstream.

[Why]
Replay and PSR will cause some video corruption while VRR is enabled.

[How]
1. Disable the Replay and PSR while VRR is enabled.
2. Change the amdgpu_dm_crtc_vrr_active() parameter to const.
   Because the function will only read data from dm_crtc_state.

Reviewed-by: Sun peng Li &lt;sunpeng.li@amd.com&gt;
Signed-off-by: Tom Chung &lt;chiahsuan.chung@amd.com&gt;
Signed-off-by: Roman Li &lt;roman.li@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
(cherry picked from commit d7879340e987b3056b8ae39db255b6c19c170a0d)
Cc: stable@vger.kernel.org
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Fix PSR-SU not support but still call the amdgpu_dm_psr_enable</title>
<updated>2025-01-23T16:23:04Z</updated>
<author>
<name>Tom Chung</name>
<email>chiahsuan.chung@amd.com</email>
</author>
<published>2024-12-05T15:08:28Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=583d3a42b2bf24583d81c6a6eb40a653eab0ba6e'/>
<id>urn:sha1:583d3a42b2bf24583d81c6a6eb40a653eab0ba6e</id>
<content type='text'>
commit b0a3e840ad287c33a86b5515d606451b7df86ad4 upstream.

[Why]
The enum DC_PSR_VERSION_SU_1 of psr_version is 1 and
DC_PSR_VERSION_UNSUPPORTED is 0xFFFFFFFF.

The original code may has chance trigger the amdgpu_dm_psr_enable()
while psr version is set to DC_PSR_VERSION_UNSUPPORTED.

[How]
Modify the condition to psr-&gt;psr_version == DC_PSR_VERSION_SU_1

Reviewed-by: Sun peng Li &lt;sunpeng.li@amd.com&gt;
Signed-off-by: Tom Chung &lt;chiahsuan.chung@amd.com&gt;
Signed-off-by: Roman Li &lt;roman.li@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
(cherry picked from commit f765e7ce0417f8dc38479b4b495047c397c16902)
Cc: stable@vger.kernel.org
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: always sync the GFX pipe on ctx switch</title>
<updated>2025-01-23T16:23:04Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2024-12-20T15:21:11Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=1366b0e9dd575034f7573e4e3bba88a46a5733be'/>
<id>urn:sha1:1366b0e9dd575034f7573e4e3bba88a46a5733be</id>
<content type='text'>
commit af04b320c71c4b59971f021615876808a36e5038 upstream.

That is needed to enforce isolation between contexts.

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
(cherry picked from commit def59436fb0d3ca0f211d14873d0273d69ebb405)
Cc: stable@vger.kernel.org
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: disable gfxoff with the compute workload on gfx12</title>
<updated>2025-01-23T16:23:04Z</updated>
<author>
<name>Kenneth Feng</name>
<email>kenneth.feng@amd.com</email>
</author>
<published>2025-01-09T07:58:23Z</published>
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<id>urn:sha1:ffb0308bd6ecd6715cac8deb5b94265c379dfb0c</id>
<content type='text'>
commit 90505894c4ed581318836b792c57723df491cb91 upstream.

Disable gfxoff with the compute workload on gfx12. This is a
workaround for the opencl test failure.

Signed-off-by: Kenneth Feng &lt;kenneth.feng@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
(cherry picked from commit 2affe2bbc997b3920045c2c434e480c81a5f9707)
Cc: stable@vger.kernel.org # 6.12.x
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: fix fw attestation for MP0_14_0_{2/3}</title>
<updated>2025-01-23T16:23:04Z</updated>
<author>
<name>Gui Chengming</name>
<email>Jack.Gui@amd.com</email>
</author>
<published>2025-01-07T09:09:08Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=0c2196bb020dbd00dab9a7fc5ba5b0a2812f65b8'/>
<id>urn:sha1:0c2196bb020dbd00dab9a7fc5ba5b0a2812f65b8</id>
<content type='text'>
commit bd275e6cfc972329d39c6406a3c6d2ba2aba7db6 upstream.

FW attestation was disabled on MP0_14_0_{2/3}.

V2:
Move check into is_fw_attestation_support func. (Frank)
Remove DRM_WARN log info. (Alex)
Fix format. (Christian)

Signed-off-by: Gui Chengming &lt;Jack.Gui@amd.com&gt;
Reviewed-by: Frank.Min &lt;Frank.Min@amd.com&gt;
Reviewed-by: Christian König &lt;Christian.Koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
(cherry picked from commit 62952a38d9bcf357d5ffc97615c48b12c9cd627c)
Cc: stable@vger.kernel.org # 6.12.x
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/smu13: update powersave optimizations</title>
<updated>2025-01-23T16:23:04Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2025-01-08T20:17:12Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=6f8e1a35cc128ac5f74ddc8649a6fa44f3e2031f'/>
<id>urn:sha1:6f8e1a35cc128ac5f74ddc8649a6fa44f3e2031f</id>
<content type='text'>
commit 11510e67d0bd956878ab4ffa03c45766788092c1 upstream.

Only apply when compute profile is selected.  This is
the only supported configuration.  Selecting other
profiles can lead to performane degradations.

Reviewed-by: Kenneth Feng &lt;kenneth.feng@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
(cherry picked from commit d477e39532d725b1cdb3c8005c689c74ffbf3b94)
Cc: stable@vger.kernel.org # 6.12.x
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>drm/xe/oa: Add missing VISACTL mux registers</title>
<updated>2025-01-23T16:23:04Z</updated>
<author>
<name>Ashutosh Dixit</name>
<email>ashutosh.dixit@intel.com</email>
</author>
<published>2025-01-11T02:15:39Z</published>
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<id>urn:sha1:b7da3df91042e8b356cf6642ec3eb6352641afe1</id>
<content type='text'>
commit 79a21fc921d7aafaf69d00b4938435b81bf66022 upstream.

Add missing VISACTL mux registers required for some OA
config's (e.g. RenderPipeCtrl).

Fixes: cdf02fe1a94a ("drm/xe/oa/uapi: Add/remove OA config perf ops")
Cc: stable@vger.kernel.org
Signed-off-by: Ashutosh Dixit &lt;ashutosh.dixit@intel.com&gt;
Reviewed-by: Umesh Nerlige Ramappa &lt;umesh.nerlige.ramappa@intel.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20250111021539.2920346-1-ashutosh.dixit@intel.com
(cherry picked from commit c26f22dac3449d8a687237cdfc59a6445eb8f75a)
Signed-off-by: Thomas Hellström &lt;thomas.hellstrom@linux.intel.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
</feed>
