<feed xmlns='http://www.w3.org/2005/Atom'>
<title>user/sven/linux.git/include/clocksource, branch v5.10.76</title>
<subtitle>Linux Kernel
</subtitle>
<id>https://git.stealer.net/cgit.cgi/user/sven/linux.git/atom?h=v5.10.76</id>
<link rel='self' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/atom?h=v5.10.76'/>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/'/>
<updated>2021-07-14T14:56:12Z</updated>
<entry>
<title>clocksource/drivers/timer-ti-dm: Save and restore timer TIOCP_CFG</title>
<updated>2021-07-14T14:56:12Z</updated>
<author>
<name>Tony Lindgren</name>
<email>tony@atomide.com</email>
</author>
<published>2021-04-15T08:55:06Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=45b399e309f5aed3a4e8538b1fa86d808af6e6fb'/>
<id>urn:sha1:45b399e309f5aed3a4e8538b1fa86d808af6e6fb</id>
<content type='text'>
[ Upstream commit 9517c577f9f722270584cfb1a7b4e1354e408658 ]

As we are using cpu_pm to save and restore context, we must also save and
restore the timer sysconfig register TIOCP_CFG. This is needed because
we are not calling PM runtime functions at all with cpu_pm.

Fixes: b34677b0999a ("clocksource/drivers/timer-ti-dm: Implement cpu_pm notifier for context save and restore")
Cc: Aaro Koskinen &lt;aaro.koskinen@iki.fi&gt;
Cc: Adam Ford &lt;aford173@gmail.com&gt;
Cc: Andreas Kemnade &lt;andreas@kemnade.info&gt;
Cc: Lokesh Vutla &lt;lokeshvutla@ti.com&gt;
Cc: Peter Ujfalusi &lt;peter.ujfalusi@gmail.com&gt;
Signed-off-by: Tony Lindgren &lt;tony@atomide.com&gt;
Signed-off-by: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
Link: https://lore.kernel.org/r/20210415085506.56828-1-tony@atomide.com
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>clocksource/drivers/sp804: Remove unused sp804_timer_disable() and timer-sp804.h</title>
<updated>2020-09-24T08:51:04Z</updated>
<author>
<name>Zhen Lei</name>
<email>thunder.leizhen@huawei.com</email>
</author>
<published>2020-09-18T13:22:30Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=65f4d7ddc7b681001246f60c22a3cf650864da35'/>
<id>urn:sha1:65f4d7ddc7b681001246f60c22a3cf650864da35</id>
<content type='text'>
Since commit 7484c727b636 ("ARM: realview: delete the RealView board
files") and commit 16956fed35fe ("ARM: versatile: switch to DT only
booting and remove legacy code"), there's no one to use the functions
defined or declared in include/clocksource/timer-sp804.h. Delete it.

Signed-off-by: Zhen Lei &lt;thunder.leizhen@huawei.com&gt;
Signed-off-by: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
Link: https://lore.kernel.org/r/20200918132237.3552-3-thunder.leizhen@huawei.com
</content>
</entry>
<entry>
<title>include/: replace HTTP links with HTTPS ones</title>
<updated>2020-08-12T17:57:59Z</updated>
<author>
<name>Alexander A. Klimov</name>
<email>grandmaster@al2klimov.de</email>
</author>
<published>2020-08-12T01:34:19Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=7f317d34906c1033f0752fc137dda04e43979bb8'/>
<id>urn:sha1:7f317d34906c1033f0752fc137dda04e43979bb8</id>
<content type='text'>
Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.

Signed-off-by: Alexander A. Klimov &lt;grandmaster@al2klimov.de&gt;
Signed-off-by: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Reviewed-by: Kees Cook &lt;keescook@chromium.org&gt;
Link: http://lkml.kernel.org/r/20200726110117.16346-1-grandmaster@al2klimov.de
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</content>
</entry>
<entry>
<title>pwm: omap-dmtimer: Drop unused header file</title>
<updated>2020-03-30T16:03:06Z</updated>
<author>
<name>Lokesh Vutla</name>
<email>lokeshvutla@ti.com</email>
</author>
<published>2020-03-12T04:22:06Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=54091b5f195b45a9a7d394008c06d2b9646ab126'/>
<id>urn:sha1:54091b5f195b45a9a7d394008c06d2b9646ab126</id>
<content type='text'>
pwm_omap_dmtimer.h is used only:
- to typedef struct omap_dm_timer to pwm_omap_dmtimer
- for macro PWM_OMAP_DMTIMER_TRIGGER_OVERFLOW_AND_COMPARE
Rest of the file is pretty mush unsed. So reuse omap_dm_timer
and OMAP_TIMER_TRIGGER_OVERFLOW_AND_COMPARE in pwm-omap-dmtimer.c
and delete the header file.

Acked-by: Tony Lindgren &lt;tony@atomide.com&gt;
Signed-off-by: Lokesh Vutla &lt;lokeshvutla@ti.com&gt;
Acked-by: Uwe Kleine-König &lt;u.kleine-koenig@pengutronix.de&gt;
Signed-off-by: Thierry Reding &lt;thierry.reding@gmail.com&gt;
</content>
</entry>
<entry>
<title>clocksource/drivers/timer-ti-dm: Implement cpu_pm notifier for context save and restore</title>
<updated>2020-03-16T11:40:29Z</updated>
<author>
<name>Lokesh Vutla</name>
<email>lokeshvutla@ti.com</email>
</author>
<published>2020-03-16T11:14:53Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=b34677b0999a7c0de45e57b780508c14cb438ed8'/>
<id>urn:sha1:b34677b0999a7c0de45e57b780508c14cb438ed8</id>
<content type='text'>
omap_dm_timer_enable() restores the entire context(including counter)
based on 2 conditions:
- If get_context_loss_count is populated and context is lost.
- If get_context_loss_count is not populated update unconditionally.

Case2 has a side effect of updating the counter register even though
context is not lost. When timer is configured in pwm mode, this is
causing undesired behaviour in the pwm period.

Instead of using get_context_loss_count call back, implement cpu_pm
notifier with context save and restore support. And delete the
get_context_loss_count callback all together.

Suggested-by: Tony Lindgren &lt;tony@atomide.com&gt;
Signed-off-by: Lokesh Vutla &lt;lokeshvutla@ti.com&gt;
[tony@atomide.com: removed pm_runtime calls from cpuidle calls]
Signed-off-by: Tony Lindgren &lt;tony@atomide.com&gt;
Signed-off-by: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
Link: https://lore.kernel.org/r/20200316111453.15441-1-lokeshvutla@ti.com
</content>
</entry>
<entry>
<title>clocksource/drivers/timer-ti-dm: Prepare for using cpuidle</title>
<updated>2020-03-16T11:40:21Z</updated>
<author>
<name>Tony Lindgren</name>
<email>tony@atomide.com</email>
</author>
<published>2020-03-05T08:27:11Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=5e20931c6a750b4b1ea9a2f7b863cc2dd9222ead'/>
<id>urn:sha1:5e20931c6a750b4b1ea9a2f7b863cc2dd9222ead</id>
<content type='text'>
Let's add runtime_suspend and resume functions and atomic enabled
flag. This way we can use these when converting to use cpuidle
for saving and restoring device context.

And we need to maintain the driver state in the driver as documented
in "9. Autosuspend, or automatically-delayed suspends" in the
Documentation/power/runtime_pm.rst document related to using driver
private lock and races with runtime_suspend().

Signed-off-by: Tony Lindgren &lt;tony@atomide.com&gt;
Signed-off-by: Lokesh Vutla &lt;lokeshvutla@ti.com&gt;
Signed-off-by: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
Link: https://lore.kernel.org/r/20200305082715.15861-3-lokeshvutla@ti.com
</content>
</entry>
<entry>
<title>clocksource/drivers/hyper-v: Untangle stimers and timesync from clocksources</title>
<updated>2020-01-16T18:09:02Z</updated>
<author>
<name>Andrea Parri</name>
<email>parri.andrea@gmail.com</email>
</author>
<published>2020-01-09T16:06:49Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=0af3e137c144377fbaf5025ba784ff5ba7ad40c9'/>
<id>urn:sha1:0af3e137c144377fbaf5025ba784ff5ba7ad40c9</id>
<content type='text'>
hyperv_timer.c exports hyperv_cs, which is used by stimers and the
timesync mechanism.  However, the clocksource dependency is not
needed: these mechanisms only depend on the partition reference
counter (which can be read via a MSR or via the TSC Reference Page).

Introduce the (function) pointer hv_read_reference_counter, as an
embodiment of the partition reference counter read, and export it
in place of the hyperv_cs pointer.  The latter can be removed.

This should clarify that there's no relationship between Hyper-V
stimers &amp; timesync and the Linux clocksource abstractions.  No
functional or semantic change.

Suggested-by: Michael Kelley &lt;mikelley@microsoft.com&gt;
Signed-off-by: Andrea Parri &lt;parri.andrea@gmail.com&gt;
Reviewed-by: Michael Kelley &lt;mikelley@microsoft.com&gt;
Signed-off-by: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
Link: https://lore.kernel.org/r/20200109160650.16150-2-parri.andrea@gmail.com
</content>
</entry>
<entry>
<title>x86/hyperv: Initialize clockevents earlier in CPU onlining</title>
<updated>2019-11-15T09:33:49Z</updated>
<author>
<name>Michael Kelley</name>
<email>mikelley@microsoft.com</email>
</author>
<published>2019-11-13T01:11:49Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=4df4cb9e99f83b70d54bc0e25081ac23cceafcbc'/>
<id>urn:sha1:4df4cb9e99f83b70d54bc0e25081ac23cceafcbc</id>
<content type='text'>
Hyper-V has historically initialized stimer-based clockevents late in the
process of onlining a CPU because clockevents depend on stimer
interrupts. In the original Hyper-V design, stimer interrupts generate a
VMbus message, so the VMbus machinery must be running first, and VMbus
can't be initialized until relatively late. On x86/64, LAPIC timer based
clockevents are used during early initialization before VMbus and
stimer-based clockevents are ready, and again during CPU offlining after
the stimer clockevents have been shut down.

Unfortunately, this design creates problems when offlining CPUs for
hibernation or other purposes. stimer-based clockevents are shut down
relatively early in the offlining process, so clockevents_unbind_device()
must be used to fallback to the LAPIC-based clockevents for the remainder
of the offlining process.  Furthermore, the late initialization and early
shutdown of stimer-based clockevents doesn't work well on ARM64 since there
is no other timer like the LAPIC to fallback to. So CPU onlining and
offlining doesn't work properly.

Fix this by recognizing that stimer Direct Mode is the normal path for
newer versions of Hyper-V on x86/64, and the only path on other
architectures. With stimer Direct Mode, stimer interrupts don't require any
VMbus machinery. stimer clockevents can be initialized and shut down
consistent with how it is done for other clockevent devices. While the old
VMbus-based stimer interrupts must still be supported for backward
compatibility on x86, that mode of operation can be treated as legacy.

So add a new Hyper-V stimer entry in the CPU hotplug state list, and use
that new state when in Direct Mode. Update the Hyper-V clocksource driver
to allocate and initialize stimer clockevents earlier during boot. Update
Hyper-V initialization and the VMbus driver to use this new design. As a
result, the LAPIC timer is no longer used during boot or CPU
onlining/offlining and clockevents_unbind_device() is not called.  But
retain the old design as a legacy implementation for older versions of
Hyper-V that don't support Direct Mode.

Signed-off-by: Michael Kelley &lt;mikelley@microsoft.com&gt;
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Tested-by: Dexuan Cui &lt;decui@microsoft.com&gt;
Reviewed-by: Dexuan Cui &lt;decui@microsoft.com&gt;
Link: https://lkml.kernel.org/r/1573607467-9456-1-git-send-email-mikelley@microsoft.com
</content>
</entry>
<entry>
<title>clocksource/drivers/hyperv: Enable TSC page clocksource on 32bit</title>
<updated>2019-08-23T14:59:54Z</updated>
<author>
<name>Vitaly Kuznetsov</name>
<email>vkuznets@redhat.com</email>
</author>
<published>2019-08-22T08:36:30Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=3e2d94535adb2df15f3907e4b4c7cd8a5a4c2b5a'/>
<id>urn:sha1:3e2d94535adb2df15f3907e4b4c7cd8a5a4c2b5a</id>
<content type='text'>
There is no particular reason to not enable TSC page clocksource on
32-bit. mul_u64_u64_shr() is available and despite the increased
computational complexity (compared to 64bit) TSC page is still a huge win
compared to MSR-based clocksource.

In-kernel reads:
  MSR based clocksource: 3361 cycles
  TSC page clocksource: 49 cycles

Reads from userspace (utilizing vDSO in case of TSC page):
  MSR based clocksource: 5664 cycles
  TSC page clocksource: 131 cycles

Enabling TSC page on 32bits allows to get rid of CONFIG_HYPERV_TSCPAGE as
it is now not any different from CONFIG_HYPERV_TIMER.

Signed-off-by: Vitaly Kuznetsov &lt;vkuznets@redhat.com&gt;
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Reviewed-by: Michael Kelley &lt;mikelley@microsoft.com&gt;
Link: https://lkml.kernel.org/r/20190822083630.17059-1-vkuznets@redhat.com

</content>
</entry>
<entry>
<title>clocksource/drivers: Continue making Hyper-V clocksource ISA agnostic</title>
<updated>2019-07-03T09:00:59Z</updated>
<author>
<name>Michael Kelley</name>
<email>mikelley@microsoft.com</email>
</author>
<published>2019-07-01T04:26:06Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=dd2cb348613b44f9d948b068775e159aad298599'/>
<id>urn:sha1:dd2cb348613b44f9d948b068775e159aad298599</id>
<content type='text'>
Continue consolidating Hyper-V clock and timer code into an ISA
independent Hyper-V clocksource driver.

Move the existing clocksource code under drivers/hv and arch/x86 to the new
clocksource driver while separating out the ISA dependencies. Update
Hyper-V initialization to call initialization and cleanup routines since
the Hyper-V synthetic clock is not independently enumerated in ACPI.

Update Hyper-V clocksource users in KVM and VDSO to get definitions from
the new include file.

No behavior is changed and no new functionality is added.

Suggested-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Signed-off-by: Michael Kelley &lt;mikelley@microsoft.com&gt;
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Reviewed-by: Vitaly Kuznetsov &lt;vkuznets@redhat.com&gt;
Cc: "bp@alien8.de" &lt;bp@alien8.de&gt;
Cc: "will.deacon@arm.com" &lt;will.deacon@arm.com&gt;
Cc: "catalin.marinas@arm.com" &lt;catalin.marinas@arm.com&gt;
Cc: "mark.rutland@arm.com" &lt;mark.rutland@arm.com&gt;
Cc: "linux-arm-kernel@lists.infradead.org" &lt;linux-arm-kernel@lists.infradead.org&gt;
Cc: "gregkh@linuxfoundation.org" &lt;gregkh@linuxfoundation.org&gt;
Cc: "linux-hyperv@vger.kernel.org" &lt;linux-hyperv@vger.kernel.org&gt;
Cc: "olaf@aepfle.de" &lt;olaf@aepfle.de&gt;
Cc: "apw@canonical.com" &lt;apw@canonical.com&gt;
Cc: "jasowang@redhat.com" &lt;jasowang@redhat.com&gt;
Cc: "marcelo.cerri@canonical.com" &lt;marcelo.cerri@canonical.com&gt;
Cc: Sunil Muthuswamy &lt;sunilmut@microsoft.com&gt;
Cc: KY Srinivasan &lt;kys@microsoft.com&gt;
Cc: "sashal@kernel.org" &lt;sashal@kernel.org&gt;
Cc: "vincenzo.frascino@arm.com" &lt;vincenzo.frascino@arm.com&gt;
Cc: "linux-arch@vger.kernel.org" &lt;linux-arch@vger.kernel.org&gt;
Cc: "linux-mips@vger.kernel.org" &lt;linux-mips@vger.kernel.org&gt;
Cc: "linux-kselftest@vger.kernel.org" &lt;linux-kselftest@vger.kernel.org&gt;
Cc: "arnd@arndb.de" &lt;arnd@arndb.de&gt;
Cc: "linux@armlinux.org.uk" &lt;linux@armlinux.org.uk&gt;
Cc: "ralf@linux-mips.org" &lt;ralf@linux-mips.org&gt;
Cc: "paul.burton@mips.com" &lt;paul.burton@mips.com&gt;
Cc: "daniel.lezcano@linaro.org" &lt;daniel.lezcano@linaro.org&gt;
Cc: "salyzyn@android.com" &lt;salyzyn@android.com&gt;
Cc: "pcc@google.com" &lt;pcc@google.com&gt;
Cc: "shuah@kernel.org" &lt;shuah@kernel.org&gt;
Cc: "0x7f454c46@gmail.com" &lt;0x7f454c46@gmail.com&gt;
Cc: "linux@rasmusvillemoes.dk" &lt;linux@rasmusvillemoes.dk&gt;
Cc: "huw@codeweavers.com" &lt;huw@codeweavers.com&gt;
Cc: "sfr@canb.auug.org.au" &lt;sfr@canb.auug.org.au&gt;
Cc: "pbonzini@redhat.com" &lt;pbonzini@redhat.com&gt;
Cc: "rkrcmar@redhat.com" &lt;rkrcmar@redhat.com&gt;
Cc: "kvm@vger.kernel.org" &lt;kvm@vger.kernel.org&gt;
Link: https://lkml.kernel.org/r/1561955054-1838-3-git-send-email-mikelley@microsoft.com

</content>
</entry>
</feed>
