<feed xmlns='http://www.w3.org/2005/Atom'>
<title>user/sven/linux.git/include/dt-bindings/clock, branch v4.4.142</title>
<subtitle>Linux Kernel
</subtitle>
<id>https://git.stealer.net/cgit.cgi/user/sven/linux.git/atom?h=v4.4.142</id>
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<updated>2015-11-10T23:06:26Z</updated>
<entry>
<title>Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc</title>
<updated>2015-11-10T23:06:26Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2015-11-10T23:06:26Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=c0d6fe2f01c475cc137d90607a07578586883df8'/>
<id>urn:sha1:c0d6fe2f01c475cc137d90607a07578586883df8</id>
<content type='text'>
Pull ARM DT updates from Olof Johansson:
 "As usual, this is the massive branch we have for each release.  Lots
  of various updates and additions of hardware descriptions on existing
  hardware, as well as the usual additions of new boards and SoCs.

  This is also the first release where we've started mixing 64- and
  32-bit DT updates in one branch.

  (Specific details on what's actually here and new is pretty easy to
  tell from the diffstat, so there's little point in duplicating listing
  it here)"

* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (499 commits)
  ARM: dts: uniphier: add system-bus-controller nodes
  ARM64: juno: disable NOR flash node by default
  ARM: dts: uniphier: add outer cache controller nodes
  arm64: defconfig: Enable PCI generic host bridge by default
  arm64: Juno: Add support for the PCIe host bridge on Juno R1
  Documentation: of: Document the bindings used by Juno R1 PCIe host bridge
  ARM: dts: uniphier: add I2C aliases for ProXstream2 boards
  dts/Makefile: Add build support for LS2080a QDS &amp; RDB board DTS
  dts/ls2080a: Add DTS support for LS2080a QDS &amp; RDB boards
  dts/ls2080a: Update Simulator DTS to add support of various peripherals
  dts/ls2080a: Remove text about writing to Free Software Foundation
  dts/ls2080a: Update DTSI to add support of various peripherals
  doc: DTS: Update DWC3 binding to provide reference to generic bindings
  doc/bindings: Update GPIO devicetree binding documentation for LS2080A
  Documentation/dts: Move FSL board-specific bindings out of /powerpc
  Documentation: DT: Add entry for FSL LS2080A QDS and RDB boards
  arm64: Rename FSL LS2085A SoC support code to LS2080A
  arm64: Use generic Layerscape SoC family naming
  ARM: dts: uniphier: add ProXstream2 Vodka board support
  ARM: dts: uniphier: add ProXstream2 Gentil board support
  ...
</content>
</entry>
<entry>
<title>Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc</title>
<updated>2015-11-10T23:00:03Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2015-11-10T23:00:03Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=b44a3d2a85c64208a57362a1728efb58a6556cd6'/>
<id>urn:sha1:b44a3d2a85c64208a57362a1728efb58a6556cd6</id>
<content type='text'>
Pull ARM SoC driver updates from Olof Johansson:
 "As we've enabled multiplatform kernels on ARM, and greatly done away
  with the contents under arch/arm/mach-*, there's still need for
  SoC-related drivers to go somewhere.

  Many of them go in through other driver trees, but we still have
  drivers/soc to hold some of the "doesn't fit anywhere" lowlevel code
  that might be shared between ARM and ARM64 (or just in general makes
  sense to not have under the architecture directory).

  This branch contains mostly such code:

   - Drivers for qualcomm SoCs for SMEM, SMD and SMD-RPM, used to
     communicate with power management blocks on these SoCs for use by
     clock, regulator and bus frequency drivers.

   - Allwinner Reduced Serial Bus driver, again used to communicate with
     PMICs.

   - Drivers for ARM's SCPI (System Control Processor).  Not to be
     confused with PSCI (Power State Coordination Interface).  SCPI is
     used to communicate with the assistant embedded cores doing power
     management, and we have yet to see how many of them will implement
     this for their hardware vs abstracting in other ways (or not at all
     like in the past).

   - To make confusion between SCPI and PSCI more likely, this release
     also includes an update of PSCI to interface version 1.0.

   - Rockchip support for power domains.

   - A driver to talk to the firmware on Raspberry Pi"

* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (57 commits)
  soc: qcom: smd-rpm: Correct size of outgoing message
  bus: sunxi-rsb: Add driver for Allwinner Reduced Serial Bus
  bus: sunxi-rsb: Add Allwinner Reduced Serial Bus (RSB) controller bindings
  ARM: bcm2835: add mutual inclusion protection
  drivers: psci: make PSCI 1.0 functions initialization version dependent
  dt-bindings: Correct paths in Rockchip power domains binding document
  soc: rockchip: power-domain: don't try to print the clock name in error case
  soc: qcom/smem: add HWSPINLOCK dependency
  clk: berlin: add cpuclk
  ARM: berlin: dts: add CLKID_CPU for BG2Q
  ARM: bcm2835: Add the Raspberry Pi firmware driver
  soc: qcom: smem: Move RPM message ram out of smem DT node
  soc: qcom: smd-rpm: Correct the active vs sleep state flagging
  soc: qcom: smd: delete unneeded of_node_put
  firmware: qcom-scm: build for correct architecture level
  soc: qcom: smd: Correct SMEM items for upper channels
  qcom-scm: add missing prototype for qcom_scm_is_available()
  qcom-scm: fix endianess issue in __qcom_scm_is_call_available
  soc: qcom: smd: Reject send of too big packets
  soc: qcom: smd: Handle big endian CPUs
  ...
</content>
</entry>
<entry>
<title>Merge tag 'sunxi-clocks-for-4.4' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into next/dt</title>
<updated>2015-10-26T05:42:37Z</updated>
<author>
<name>Olof Johansson</name>
<email>olof@lixom.net</email>
</author>
<published>2015-10-26T05:42:37Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=edd2a06d9c06a28f6f636929d586d17de835cd6b'/>
<id>urn:sha1:edd2a06d9c06a28f6f636929d586d17de835cd6b</id>
<content type='text'>
Bringing in the sunxi clock branch since it introduces header file contents
that is needed by the DT branch. This is a stable tag shared with the clk tree.

Allwinner clock additions for 4.4

  - Support for the Audio PLL and child clocks
  - Support for the A33 AHB gates
  - New clk-multiplier generic driver

* tag 'sunxi-clocks-for-4.4' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux:
  clk: sunxi: mod1 clock support
  clk: sunxi: codec clock support
  clk: sunxi: pll2: Add A13 support
  clk: sunxi: Add a driver for the PLL2
  clk: Add a basic multiplier clock
  clk: sunxi: Add A33 gates support

Signed-off-by: Olof Johansson &lt;olof@lixom.net&gt;
</content>
</entry>
<entry>
<title>Merge tag 'arm/soc/for-4.4/rpi-dt-v2' of https://github.com/Broadcom/stblinux into next/dt</title>
<updated>2015-10-26T05:27:33Z</updated>
<author>
<name>Olof Johansson</name>
<email>olof@lixom.net</email>
</author>
<published>2015-10-26T05:27:33Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=64ebda3acd6ea592e6f97dcd0682e87aa7cf8d61'/>
<id>urn:sha1:64ebda3acd6ea592e6f97dcd0682e87aa7cf8d61</id>
<content type='text'>
This pull request contains the DT changes for BCM2835 in 4.4.  It
pulls in clk/clk-bcm2835 (which Stephen Boyd has said would be stable)
because the DT changes to enable the clock driver need the driver
itself to be present. These changes include the following:

- Eric Anholt, moves the bcm2835 clock driver under bcm/ where it belongs with
  other Broadcom clock providers drivers, defines the binding for new clock
  driver, adds support for programming the BCM2835 audio domain, adds the DDC I2C
  controller to Device Tree, and finally migrates the Device Tree to use the new
  clock driver binding

- Lubomir Rintel adds support for the Raspberry Pi Model A+ and B revision 2, and
  remove the I2S controller which is non-existent on Raspberry Pi Model B

- Stefan Wahren adds an uart0 label for referencing the UART adapter

* tag 'arm/soc/for-4.4/rpi-dt-v2' of https://github.com/Broadcom/stblinux:
  ARM: bcm2835: Add the DDC I2C controller to the device tree.
  ARM: bcm2835: Switch to using the new clock driver support.
  ARM: bcm2835: dt: Add Raspberry Pi Model A+
  ARM: bcm2835: dt: Add Raspberry Pi Model B rev2
  ARM: bcm2835: dt: Raspberry Pi Model B had no I2S
  ARM: bcm2835: add label for uart0
  clk: bcm2835: Add support for programming the audio domain clocks
  clk: bcm2835: Add binding docs for the new platform clock driver.
  clk: bcm2835: Move under bcm/ with other Broadcom SoC clk drivers.

Signed-off-by: Olof Johansson &lt;olof@lixom.net&gt;
</content>
</entry>
<entry>
<title>Merge tag 'samsung-dt-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/dt</title>
<updated>2015-10-26T01:13:50Z</updated>
<author>
<name>Olof Johansson</name>
<email>olof@lixom.net</email>
</author>
<published>2015-10-26T01:13:50Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=99b6eb55ce137d769c2294449d1fe3821def9269'/>
<id>urn:sha1:99b6eb55ce137d769c2294449d1fe3821def9269</id>
<content type='text'>
Samsung 2nd DT updates for v4.4

- use exynos5420-dw-mshc instead of exynos5250 for exynos3250
- add DISP1 clocks and the DISP1 power domain of two closk
  on exynos5250 (clock commit got Stephen's ack)
- add vbus regulators on exynos3250, exynos4210 and exynos4412 boards
- fix typo in regulator enable GPIO property on s5pv20-aquila and goni
- document: correct the example of exynos power domain clocks
- document: consolidate exynos SoC dt-bindings and non-Samsung
  boards related compatibles (FriendlyARM, Google, Hardkernel
  and Insignal)
- update MAINTAINER entries accordingly (documentation)

* tag 'samsung-dt-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
  MAINTAINERS: Add documentation and dt-bindings for exynos stuff
  dt-bindings: EXYNOS: Document compatibles from other vendors
  dt-bindings: Consolidate Exynos SoC bindings
  ARM: dts: Add clocks to DISP1 domain in exynos5250
  dt-bindings: Correct the example for Exynos power domain clocks
  ARM: dts: Fix typo in regulator enable GPIO property in s5pv210-goni
  ARM: dts: Fix typo in regulator enable GPIO property in s5pv210-aquila
  ARM: dts: Add vbus regulator to USB2 phy nodes on exynos3250, exynos4210 and exynos4412 boards
  clk: samsung: exynos5250: Add DISP1 clocks
  ARM: dts: use exynos5420-dw-mshc compatible for exynos3250

Signed-off-by: Olof Johansson &lt;olof@lixom.net&gt;
</content>
</entry>
<entry>
<title>clk: samsung: exynos5250: Add DISP1 clocks</title>
<updated>2015-10-23T19:31:18Z</updated>
<author>
<name>Tomeu Vizoso</name>
<email>tomeu.vizoso@collabora.com</email>
</author>
<published>2015-10-15T10:31:23Z</published>
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<id>urn:sha1:b4dc272b60fd7b43ff5b9ef89714d38c65db2cdb</id>
<content type='text'>
When the DISP1 power domain is powered off, there's two clocks that need
to be temporarily reparented to OSC, and back to their original parents
when the domain is powered on again.

We expose these two clocks in the DT bindings so that the DT node of the
power domain can reference them.

Signed-off-by: Tomeu Vizoso &lt;tomeu.vizoso@collabora.com&gt;
Acked-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
Signed-off-by: Krzysztof Kozlowski &lt;k.kozlowski@samsung.com&gt;
Signed-off-by: Kukjin Kim &lt;kgene@kernel.org&gt;
</content>
</entry>
<entry>
<title>Merge tag 'imx-dt-4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt</title>
<updated>2015-10-23T17:51:21Z</updated>
<author>
<name>Olof Johansson</name>
<email>olof@lixom.net</email>
</author>
<published>2015-10-23T17:51:21Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=355d1ef1adefa9bc76d0ae643aa80d611d2c2dad'/>
<id>urn:sha1:355d1ef1adefa9bc76d0ae643aa80d611d2c2dad</id>
<content type='text'>
The i.MX device tree changes for 4.4:
 - Add IOMUXC LPSR (Low Power State Retention) device for i.MX7D.
 - Add a few low power mode related devices and touch controller for
   i.MX6UL.
 - Add a number of devices for i.MX7D SDB board support, USB, Dual FEC,
   and eMMC5.0.
 - i.MX6 Boundary Devices updates: relicense under GPLv2/X11, add Okaya
   LCD, touch and wifi support, add new boards Nitrogen6_Lite and
   Nitrogen6_Max.
 - Enable touch screen and NAND Flash controller for a few Vybrid
   devices.
 - Some random and small updates on LS1021A and MXS support.

* tag 'imx-dt-4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (53 commits)
  ARM: dts: ls1021a: Add quirk for Erratum A009116
  ARM: imx6sx-sdb: Fix typo in regulator enable GPIO property
  ARM: dts: imx6: phyFLEX: fix typo in "pinctrl-names"
  ARM: dts: imx6: change the core clock of spdif
  ARM: dts: vf-colibri: enable NAND flash controller
  ARM: dts: vf610twr: add NAND flash controller peripherial
  ARM: dts: imx: add Boundary Devices Nitrogen6_Lite board
  ARM: dts: imx: add Boundary Devices Nitrogen6_Max board
  ARM: dts: imx6dl-nitrogen6x: change manufacturer to Boundary Devices
  ARM: dts: imx6q-nitrogen6x: change manufacturer to Boundary Devices
  of: Add Boundary Devices Inc. vendor prefix
  ARM: dts: imx6qdl-sabrelite: relicense under GPLv2/X11
  ARM: dts: imx6qdl-nitrogen6x: relicense under GPLv2/X11
  ARM: dts: imx6qdl-nitrogen6x: add wifi wl1271 support
  ARM: dts: imx6dql-nitrogen6x: add touchscreen support
  ARM: dts: imx6qdl-sabrelite: add Okaya LCD panel
  ARM: dts: imx6qdl-nitrogen6x: add Okaya LCD panel
  ARM: dts: vf500-colibri: Add device tree node for touchscreen support
  ARM: dts: i.MX35: fix cpu compatible value
  ARM: dts: i.MX31: fix cpu compatible value
  ...

Signed-off-by: Olof Johansson &lt;olof@lixom.net&gt;
</content>
</entry>
<entry>
<title>Merge branch 'clk-iproc' into clk-next</title>
<updated>2015-10-22T00:28:19Z</updated>
<author>
<name>Stephen Boyd</name>
<email>sboyd@codeaurora.org</email>
</author>
<published>2015-10-22T00:28:19Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=f63d19ef52aa66e97fca2425974845177ce02b0a'/>
<id>urn:sha1:f63d19ef52aa66e97fca2425974845177ce02b0a</id>
<content type='text'>
* clk-iproc:
  clk: iproc: define Broadcom NS2 iProc clock binding
  clk: iproc: define Broadcom NSP iProc clock binding
  clk: ns2: add clock support for Broadcom Northstar 2 SoC
  clk: iproc: Separate status and control variables
  clk: iproc: Split off dig_filter
  clk: iproc: Add PLL base write function
  clk: nsp: add clock support for Broadcom Northstar Plus SoC
  clk: iproc: Add PWRCTRL support
  clk: cygnus: Convert all macros to all caps
  ARM: cygnus: fix link failures when CONFIG_COMMON_CLK_IPROC is disabled
</content>
</entry>
<entry>
<title>clk: ns2: add clock support for Broadcom Northstar 2 SoC</title>
<updated>2015-10-22T00:22:58Z</updated>
<author>
<name>Jon Mason</name>
<email>jonmason@broadcom.com</email>
</author>
<published>2015-10-15T19:48:31Z</published>
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<id>urn:sha1:f7225a832dde995325b486b41728dfbe4634311c</id>
<content type='text'>
The Broadcom Northstar 2 SoC is architected under the iProc
architecture. It has the following PLLs: GENPLL SCR, GENPLL SW,
LCPLL DDR, LCPLL Ports, all derived from an onboard crystal.

Signed-off-by: Jon Mason &lt;jonmason@broadcom.com&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</content>
</entry>
<entry>
<title>clk: nsp: add clock support for Broadcom Northstar Plus SoC</title>
<updated>2015-10-21T23:53:20Z</updated>
<author>
<name>Jon Mason</name>
<email>jonmason@broadcom.com</email>
</author>
<published>2015-10-15T19:48:27Z</published>
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<id>urn:sha1:5f024b0685f753325f1b8cacbe37ffe5921b13d1</id>
<content type='text'>
The Broadcom Northstar Plus SoC is architected under the iProc
architecture. It has the following PLLs: ARMPLL, GENPLL, LCPLL0, all
derived from an onboard crystal.

Signed-off-by: Jon Mason &lt;jonmason@broadcom.com&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</content>
</entry>
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