Linux Kernel https://git.stealer.net/cgit.cgi/user/sven/linux.git/atom?h=v4.20 2018-10-02T08:02:59Z 2018-10-02T08:02:59Z Arnd Bergmann arnd@arndb.de 2018-10-02T08:02:33Z urn:sha1:68b679b339e28844d907bf5a82a23479b7dba2dd Actions Semi SoC drivers for v4.20 #2 The SPS power domain driver is extended for S900 SoC. This required merging a topic branch for the new bindings header. * tag 'actions-drivers+s900-sps-for-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/afaerber/linux-actions: soc: actions: sps: Add S900 power domains dt-bindings: power: Add Actions Semi S900 SPS soc: actions: Update SPS help text for S700 soc: actions: Convert to SPDX license identifiers Signed-off-by: Arnd Bergmann <arnd@arndb.de> 2018-09-30T14:22:50Z Manivannan Sadhasivam manivannan.sadhasivam@linaro.org 2018-04-11T16:40:33Z urn:sha1:d1ca7c56e1617ffeff71e9ba521254b8ffdeda59 Define power domains for Actions Semi S900 SoC Smart Power System (SPS). Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Andreas Färber <afaerber@suse.de> 2018-09-17T08:30:37Z Biju Das biju.das@bp.renesas.com 2018-09-11T10:12:43Z urn:sha1:841e37a5cad3976a15b531e512076a05b6045b4b Add power domain indices for RZ/G1N (R8A7744) SoC. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au> 2018-09-14T13:28:41Z Fabrizio Castro fabrizio.castro@bp.renesas.com 2018-09-10T14:41:26Z urn:sha1:cb391265bca42f17c59d90e842a6bc582e3e2211 This patch adds power domain indices for RZ/G2E. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Biju Das <biju.das@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au> 2018-09-12T08:18:55Z Biju Das biju.das@bp.renesas.com 2018-08-02T14:48:18Z urn:sha1:066f7e63b9ed0badffc32bcf135e59658b423999 This patch adds power domain indices for RZ/G2M. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Chris Paterson <chris.paterson2@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au> 2018-06-12T01:15:22Z Linus Torvalds torvalds@linux-foundation.org 2018-06-12T01:15:22Z urn:sha1:32bcbf8b6d09428907fd045a4ea90562ec7dc4a2 Pull ARM SoC driver updates from Olof Johansson: "This contains platform-related driver updates for ARM and ARM64. Highlights: - ARM SCMI (System Control & Management Interface) driver cleanups - Hisilicon support for LPC bus w/ ACPI - Reset driver updates for several platforms: Uniphier, - Rockchip power domain bindings and hardware descriptions for several SoCs. - Tegra memory controller reset improvements" * tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (59 commits) ARM: tegra: fix compile-testing PCI host driver soc: rockchip: power-domain: add power domain support for px30 dt-bindings: power: add binding for px30 power domains dt-bindings: power: add PX30 SoCs header for power-domain soc: rockchip: power-domain: add power domain support for rk3228 dt-bindings: power: add binding for rk3228 power domains dt-bindings: power: add RK3228 SoCs header for power-domain soc: rockchip: power-domain: add power domain support for rk3128 dt-bindings: power: add binding for rk3128 power domains dt-bindings: power: add RK3128 SoCs header for power-domain soc: rockchip: power-domain: add power domain support for rk3036 dt-bindings: power: add binding for rk3036 power domains dt-bindings: power: add RK3036 SoCs header for power-domain dt-bindings: memory: tegra: Remove Tegra114 SATA and AFI reset definitions memory: tegra: Remove Tegra114 SATA and AFI reset definitions memory: tegra: Register SMMU after MC driver became ready soc: mediatek: remove unneeded semicolon soc: mediatek: add a fixed wait for SRAM stable soc: mediatek: introduce a CAPS flag for scp_domain_data soc: mediatek: reuse regmap_read_poll_timeout helpers ... 2018-05-23T18:47:57Z Finley Xiao finley.xiao@rock-chips.com 2018-05-23T06:52:21Z urn:sha1:c736afccf29005f87d81ea7cb24b8d840c5e3651 According to a description from TRM, add all the power domains. Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com> Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de> 2018-05-23T18:47:57Z Elaine Zhang zhangqing@rock-chips.com 2018-05-23T06:51:26Z urn:sha1:3cfff9adab0447c0bb858ba4d36b9affb88af406 According to a description from TRM, add all the power domains. Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de> 2018-05-23T18:47:57Z Elaine Zhang zhangqing@rock-chips.com 2018-05-23T06:50:31Z urn:sha1:1844cc7ebb95d500fcf13fa491017e760947db0e According to a description from TRM, add all the power domains. Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de> 2018-05-23T10:52:52Z Caesar Wang wxt@rock-chips.com 2018-05-23T06:48:37Z urn:sha1:a25005310b3ad6df93fbda5ec41b505d5e769799 According to a description from TRM, add all the power domains. Signed-off-by: Caesar Wang <wxt@rock-chips.com> Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de>