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<title>user/sven/linux.git/include/kvm, branch v5.15.3</title>
<subtitle>Linux Kernel
</subtitle>
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<updated>2021-09-20T11:43:34Z</updated>
<entry>
<title>KVM: arm64: Fix PMU probe ordering</title>
<updated>2021-09-20T11:43:34Z</updated>
<author>
<name>Marc Zyngier</name>
<email>maz@kernel.org</email>
</author>
<published>2021-09-19T13:09:49Z</published>
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<id>urn:sha1:e840f42a49925707fca90e6c7a4095118fdb8c4d</id>
<content type='text'>
Russell reported that since 5.13, KVM's probing of the PMU has
started to fail on his HW. As it turns out, there is an implicit
ordering dependency between the architectural PMU probing code and
and KVM's own probing. If, due to probe ordering reasons, KVM probes
before the PMU driver, it will fail to detect the PMU and prevent it
from being advertised to guests as well as the VMM.

Obviously, this is one probing too many, and we should be able to
deal with any ordering.

Add a callback from the PMU code into KVM to advertise the registration
of a host CPU PMU, allowing for any probing order.

Fixes: 5421db1be3b1 ("KVM: arm64: Divorce the perf code from oprofile helpers")
Reported-by: "Russell King (Oracle)" &lt;linux@armlinux.org.uk&gt;
Tested-by: Russell King (Oracle) &lt;rmk+kernel@armlinux.org.uk&gt;
Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
Link: https://lore.kernel.org/r/YUYRKVflRtUytzy5@shell.armlinux.org.uk
Cc: stable@vger.kernel.org
</content>
</entry>
<entry>
<title>KVM: arm64: vgic: Implement SW-driven deactivation</title>
<updated>2021-06-01T09:46:00Z</updated>
<author>
<name>Marc Zyngier</name>
<email>maz@kernel.org</email>
</author>
<published>2021-03-15T13:11:58Z</published>
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<id>urn:sha1:354920e79441c8a53ac73008b06d3b70ed06eb34</id>
<content type='text'>
In order to deal with these systems that do not offer HW-based
deactivation of interrupts, let implement a SW-based approach:

- When the irq is queued into a LR, treat it as a pure virtual
  interrupt and set the EOI flag in the LR.

- When the interrupt state is read back from the LR, force a
  deactivation when the state is invalid (neither active nor
  pending)

Interrupts requiring such treatment get the VGIC_SW_RESAMPLE flag.

Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
</content>
</entry>
<entry>
<title>KVM: arm64: vgic: move irq-&gt;get_input_level into an ops structure</title>
<updated>2021-06-01T09:45:59Z</updated>
<author>
<name>Marc Zyngier</name>
<email>maz@kernel.org</email>
</author>
<published>2021-03-01T17:39:39Z</published>
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<id>urn:sha1:db75f1a33f82ad332b6e139c5960e01999969d2c</id>
<content type='text'>
We already have the option to attach a callback to an interrupt
to retrieve its pending state. As we are planning to expand this
facility, move this callback into its own data structure.

This will limit the size of individual interrupts as the ops
structures can be shared across multiple interrupts.

Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
</content>
</entry>
<entry>
<title>KVM: arm64: vgic: Let an interrupt controller advertise lack of HW deactivation</title>
<updated>2021-06-01T09:45:59Z</updated>
<author>
<name>Marc Zyngier</name>
<email>maz@kernel.org</email>
</author>
<published>2021-03-15T21:56:47Z</published>
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<id>urn:sha1:f6c3e24fb721dda247f6691c809d6e6c413f22c7</id>
<content type='text'>
The vGIC, as architected by ARM, allows a virtual interrupt to
trigger the deactivation of a physical interrupt. This allows
the following interrupt to be delivered without requiring an exit.

However, some implementations have choosen not to implement this,
meaning that we will need some unsavoury workarounds to deal with this.

On detecting such a case, taint the kernel and spit a nastygram.
We'll deal with this in later patches.

Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
</content>
</entry>
<entry>
<title>Merge branch 'kvm-arm64/kill_oprofile_dependency' into kvmarm-master/next</title>
<updated>2021-04-22T12:41:49Z</updated>
<author>
<name>Marc Zyngier</name>
<email>maz@kernel.org</email>
</author>
<published>2021-04-22T12:41:49Z</published>
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<id>urn:sha1:9a8aae605b80fc0a830cdce747eed48e11acc067</id>
<content type='text'>
Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
</content>
</entry>
<entry>
<title>KVM: arm64: Divorce the perf code from oprofile helpers</title>
<updated>2021-04-22T12:32:39Z</updated>
<author>
<name>Marc Zyngier</name>
<email>maz@kernel.org</email>
</author>
<published>2021-04-14T13:44:05Z</published>
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<id>urn:sha1:5421db1be3b11c5e469cce3760d5c8a013a90f2c</id>
<content type='text'>
KVM/arm64 is the sole user of perf_num_counters(), and really
could do without it. Stop using the obsolete API by relying on
the existing probing code.

Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
Acked-by: Will Deacon &lt;will@kernel.org&gt;
Link: https://lore.kernel.org/r/20210414134409.1266357-2-maz@kernel.org
</content>
</entry>
<entry>
<title>KVM: arm64: vgic-v3: Expose GICR_TYPER.Last for userspace</title>
<updated>2021-04-06T13:51:38Z</updated>
<author>
<name>Eric Auger</name>
<email>eric.auger@redhat.com</email>
</author>
<published>2021-04-05T16:39:40Z</published>
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<id>urn:sha1:28e9d4bce3be9b8fec6c854f87923db99c8fb874</id>
<content type='text'>
Commit 23bde34771f1 ("KVM: arm64: vgic-v3: Drop the
reporting of GICR_TYPER.Last for userspace") temporarily fixed
a bug identified when attempting to access the GICR_TYPER
register before the redistributor region setting, but dropped
the support of the LAST bit.

Emulating the GICR_TYPER.Last bit still makes sense for
architecture compliance though. This patch restores its support
(if the redistributor region was set) while keeping the code safe.

We introduce a new helper, vgic_mmio_vcpu_rdist_is_last() which
computes whether a redistributor is the highest one of a series
of redistributor contributor pages.

With this new implementation we do not need to have a uaccess
read accessor anymore.

Signed-off-by: Eric Auger &lt;eric.auger@redhat.com&gt;
Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
Link: https://lore.kernel.org/r/20210405163941.510258-9-eric.auger@redhat.com
</content>
</entry>
<entry>
<title>KVM: arm64: Turn kvm_arm_support_pmu_v3() into a static key</title>
<updated>2021-03-06T09:18:40Z</updated>
<author>
<name>Marc Zyngier</name>
<email>maz@kernel.org</email>
</author>
<published>2021-03-05T18:52:50Z</published>
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<id>urn:sha1:6b5b368fccd7109b052e45af8ba1464c8d140a49</id>
<content type='text'>
We currently find out about the presence of a HW PMU (or the handling
of that PMU by perf, which amounts to the same thing) in a fairly
roundabout way, by checking the number of counters available to perf.
That's good enough for now, but we will soon need to find about about
that on paths where perf is out of reach (in the world switch).

Instead, let's turn kvm_arm_support_pmu_v3() into a static key.

Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
Reviewed-by: Alexandru Elisei &lt;alexandru.elisei@arm.com&gt;
Link: https://lore.kernel.org/r/20210209114844.3278746-2-maz@kernel.org
Message-Id: &lt;20210305185254.3730990-5-maz@kernel.org&gt;
Signed-off-by: Paolo Bonzini &lt;pbonzini@redhat.com&gt;
</content>
</entry>
<entry>
<title>KVM: arm64: Replace KVM_ARM_PMU with HW_PERF_EVENTS</title>
<updated>2021-01-04T16:50:16Z</updated>
<author>
<name>Marc Zyngier</name>
<email>maz@kernel.org</email>
</author>
<published>2021-01-04T16:50:16Z</published>
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<id>urn:sha1:8cbebc4118b5933b3ae6351ceb433f75ac6b7c6b</id>
<content type='text'>
KVM_ARM_PMU only existed for the benefit of 32bit ARM hosts,
and makes no sense now that we are 64bit only. Get rid of it.

Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
</content>
</entry>
<entry>
<title>Merge remote-tracking branch 'origin/kvm-arm64/misc-5.11' into kvmarm-master/queue</title>
<updated>2020-12-04T10:12:55Z</updated>
<author>
<name>Marc Zyngier</name>
<email>maz@kernel.org</email>
</author>
<published>2020-12-04T10:12:55Z</published>
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<id>urn:sha1:17f84520cb8fcaf475c96c3ee90dd97b55a63669</id>
<content type='text'>
Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
</content>
</entry>
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