user/sven/linux.git/include/linux/clk/tegra.h, branch v4.14.235

clk: tegra: Add SATA seq input control

2017-03-20T13:26:03Z

This will be used by the powergating driver to ensure proper sequencer state when the SATA domain is powergated. Signed-off-by: Peter De Schrijver Signed-off-by: Thierry Reding

clk: tegra: Handle UTMIPLL IDDQ

2017-03-20T13:09:05Z

Export UTMIPLL IDDQ functions. These will be needed when powergating the XUSB partition. Signed-off-by: BH Hsieh Signed-off-by: Peter De Schrijver Signed-off-by: Thierry Reding

clk: tegra: Add interface to enable hardware control of SATA/XUSB PLLs

2016-04-28T10:41:44Z

On Tegra210, hardware control of the SATA and XUSB pad PLLs must be done during the UPHY enable sequence rather than the PLLE enable sequence. Export functions to do this so that hardware control can be enabled from the XUSB padctl driver. Signed-off-by: Andrew Bresticker Signed-off-by: Rhyland Klein Signed-off-by: Thierry Reding

clk: tegra: Properly include clk.h

2015-07-20T18:11:17Z

Clock provider drivers generally shouldn't include clk.h because it's the consumer API. Only include clk.h in files that are using it. Also add in a clkdev.h include that was missing in a file using clkdev APIs. Cc: Peter De Schrijver Cc: Thierry Reding Signed-off-by: Stephen Boyd

clk: tegra: make tegra_clocks_apply_init_table() arch_initcall

2015-02-02T13:47:28Z

tegra_clocks_apply_init_table() needs to be called after the udelay loop has been calibrated (see commit 441f199a37cfd66c5dd8dd45490bd3ea6971117d ("clk: tegra: defer application of init table") for why that is). On existing Tegra SoCs this was done by calling tegra_clocks_apply_init_table() from tegra_dt_init(). To make this also work on ARM64, we need to change this into an initcall. tegra_dt_init() is called from customize_machine which is an arch_initcall. Therefore this should also work on existing 32bit Tegra SoCs. Tested on Tegra20 (ventana), Tegra30 (beaverboard), Tegra124 (jetson TK1) and Tegra132. Signed-off-by: Peter De Schrijver [paul@pwsan.com: tweaked the commit message] Signed-off-by: Paul Walmsley Signed-off-by: Paul Walmsley Cc: Thierry Reding Cc: Prashant Gaikwad Cc: Mike Turquette Cc: Stephen Boyd Cc: Stephen Warren Cc: Thierry Reding Cc: Alexandre Courbot

clk: tegra: remove legacy reset APIs

2013-12-11T23:45:07Z

Now that no code uses the custom Tegra module reset API, we can remove its implementation. Signed-off-by: Stephen Warren Reviewed-by: Thierry Reding Acked-By: Peter De Schrijver

clk: tegra: fix ifdef for tegra_periph_reset_assert inline

2013-06-24T21:17:59Z

Commit 7064f6b "clk: tegra: provide tegra_periph_reset_assert alternative" added ifdef'd static inline versions of some functions, but tested ARCH_TEGRA rather than CONFIG_ARCH_TEGRA, thus disabling these function in all cases. In some cases, this caused HW modules to misbehave; for example, the Tegra I2C driver BUG()d during boot on Seaboard. Reported-by: Olof Johansson Signed-off-by: Stephen Warren Tested-by: Paul Walmsley Signed-off-by: Mike Turquette

clk: tegra: provide tegra_periph_reset_assert alternative

2013-06-22T18:03:09Z

We have some tegra device drivers that are written to be platform independent but still use the tegra specific tegra_periph_reset_assert function. In order to build and link them without errors, this provides a static inline version of these functions that does nothing when Tegra support is disabled. Signed-off-by: Arnd Bergmann Acked-by: Stephen Warren Signed-off-by: Mike Turquette [mturquette@linaro.org: fixed up trivial merge issue]

clk: tegra: Use common of_clk_init function

2013-05-31T19:57:25Z

Use common of_clk_init() function for clocks initialization. Signed-off-by: Prashant Gaikwad Reviewed-by: Thierry Reding Acked-by: Stephen Warren Signed-off-by: Mike Turquette

clk: tegra: defer application of init table

2013-04-04T22:09:05Z

The Tegra clock driver is initialized during the ARM machine descriptor's .init_irq() hook. It can't be initialized earlier, since dynamic memory usage is required. It can't be initialized later, since the .init_timer() hook needs the clocks initialized. However, at this time, udelay() doesn't work. The Tegra clock initialization table may enable some PLLs. Enabling a PLL may require usage of udelay(). Hence, this can't happen right when the clock driver is initialized. To solve this, separate the clock driver initialization from the clock table processing, so they can execute at separate times. Signed-off-by: Stephen Warren