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<title>user/sven/linux.git/include/linux/firmware, branch v4.20.5</title>
<subtitle>Linux Kernel
</subtitle>
<id>https://git.stealer.net/cgit.cgi/user/sven/linux.git/atom?h=v4.20.5</id>
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<updated>2018-10-10T11:47:06Z</updated>
<entry>
<title>Merge tag 'zynqmp-soc-clk-for-v4.20' of https://github.com/Xilinx/linux-xlnx into next/drivers</title>
<updated>2018-10-10T11:47:06Z</updated>
<author>
<name>Arnd Bergmann</name>
<email>arnd@arndb.de</email>
</author>
<published>2018-10-10T11:46:19Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=e4c080a10a23577303c0ef05c37c18661f758f34'/>
<id>urn:sha1:e4c080a10a23577303c0ef05c37c18661f758f34</id>
<content type='text'>
arm64: zynqmp: SoC CLK changes for v4.20

This patchset adds CCF compliant clock driver for ZynqMP.
Clock driver queries supported clock information from firmware
and regiters pll and output clocks with CCF.

* tag 'zynqmp-soc-clk-for-v4.20' of https://github.com/Xilinx/linux-xlnx:
  drivers: clk: Add ZynqMP clock driver
  dt-bindings: clock: Add bindings for ZynqMP clock driver
  firmware: xilinx: Add zynqmp IOCTL API for device control
  Documentation: xilinx: Add documentation for eemi APIs

Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
</entry>
<entry>
<title>Merge tag 'imx-drivers-4.20-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/drivers</title>
<updated>2018-10-10T11:40:22Z</updated>
<author>
<name>Arnd Bergmann</name>
<email>arnd@arndb.de</email>
</author>
<published>2018-10-10T11:35:29Z</published>
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<id>urn:sha1:b0a2cea5eb637d540ba86fd31dfd750f26ee0161</id>
<content type='text'>
i.MX drivers change for 4.20, round 2:
 - A series from Aisheng Dong to add SCU firmware driver for i.MX8
   SoCs.  It implements IPC mechanism based on mailbox for message
   exchange between AP and SCU firmware, and a set of SCU IPC
   service APIs used by clients like i.MX8 power domain and clock
   drivers.

* tag 'imx-drivers-4.20-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  MAINTAINERS: imx: include drivers/firmware/imx path
  firmware: imx: add misc svc support
  firmware: imx: add SCU firmware driver support
  dt-bindings: arm: fsl: add scu binding doc

Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
</entry>
<entry>
<title>drivers: clk: Add ZynqMP clock driver</title>
<updated>2018-10-09T11:29:19Z</updated>
<author>
<name>Jolly Shah</name>
<email>jolly.shah@xilinx.com</email>
</author>
<published>2018-10-08T18:21:46Z</published>
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<id>urn:sha1:3fde0e16d016ecb273f0fa404b5d56b947fc0576</id>
<content type='text'>
This patch adds CCF compliant clock driver for ZynqMP.
Clock driver queries supported clock information from
firmware and regiters pll and output clocks with CCF.

Signed-off-by: Rajan Vaja &lt;rajan.vaja@xilinx.com&gt;
Signed-off-by: Tejas Patel &lt;tejasp@xilinx.com&gt;
Signed-off-by: Shubhrajyoti Datta &lt;shubhrajyoti.datta@xilinx.com&gt;
Signed-off-by: Jolly Shah &lt;jolly.shah@xilinx.com&gt;
Acked-by: Olof Johansson &lt;olof@lixom.net&gt;
Reviewed-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</content>
</entry>
<entry>
<title>firmware: xilinx: Add zynqmp IOCTL API for device control</title>
<updated>2018-10-09T11:26:21Z</updated>
<author>
<name>Rajan Vaja</name>
<email>rajan.vaja@xilinx.com</email>
</author>
<published>2018-10-08T18:21:44Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=3b0296b8c893adb17b422179b9e779e4c32aa347'/>
<id>urn:sha1:3b0296b8c893adb17b422179b9e779e4c32aa347</id>
<content type='text'>
Add ZynqMP firmware IOCTL API to control and configure
devices like PLLs, SD, Gem, etc.

Signed-off-by: Rajan Vaja &lt;rajan.vaja@xilinx.com&gt;
Signed-off-by: Jolly Shah &lt;jollys@xilinx.com&gt;
Acked-by: Olof Johansson &lt;olof@lixom.net&gt;
Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</content>
</entry>
<entry>
<title>firmware: imx: add misc svc support</title>
<updated>2018-10-08T14:09:09Z</updated>
<author>
<name>Dong Aisheng</name>
<email>aisheng.dong@nxp.com</email>
</author>
<published>2018-10-07T13:04:43Z</published>
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<id>urn:sha1:15e1f2bc8b3b2d238b9e06b128d4a09d28f11733</id>
<content type='text'>
Add SCU MISC SVC support which provides misc control get/set functions.

Cc: Shawn Guo &lt;shawnguo@kernel.org&gt;
Reviewed-by: Sascha Hauer &lt;s.hauer@pengutronix.de&gt;
Signed-off-by: Dong Aisheng &lt;aisheng.dong@nxp.com&gt;
Signed-off-by: Shawn Guo &lt;shawnguo@kernel.org&gt;
</content>
</entry>
<entry>
<title>firmware: imx: add SCU firmware driver support</title>
<updated>2018-10-08T14:09:09Z</updated>
<author>
<name>Dong Aisheng</name>
<email>aisheng.dong@nxp.com</email>
</author>
<published>2018-10-07T13:04:42Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=edbee095fafb4b727b51032bdc41e345f95bbc20'/>
<id>urn:sha1:edbee095fafb4b727b51032bdc41e345f95bbc20</id>
<content type='text'>
The System Controller Firmware (SCFW) is a low-level system function
which runs on a dedicated Cortex-M core to provide power, clock, and
resource management. It exists on some i.MX8 processors. e.g. i.MX8QM
(QM, QP), and i.MX8QX (QXP, DX).

This patch implements the SCU firmware IPC function and the common
message sending API sc_call_rpc.

Cc: Shawn Guo &lt;shawnguo@kernel.org&gt;
Cc: Fabio Estevam &lt;fabio.estevam@nxp.com&gt;
Cc: Jassi Brar &lt;jassisinghbrar@gmail.com&gt;
Reviewed-by: Sascha Hauer &lt;s.hauer@pengutronix.de&gt;
Signed-off-by: Dong Aisheng &lt;aisheng.dong@nxp.com&gt;
Signed-off-by: Shawn Guo &lt;shawnguo@kernel.org&gt;
</content>
</entry>
<entry>
<title>Merge tag 'zynqmp-soc-for-v4.20-v2' of https://github.com/Xilinx/linux-xlnx into next/drivers</title>
<updated>2018-09-26T15:18:53Z</updated>
<author>
<name>Arnd Bergmann</name>
<email>arnd@arndb.de</email>
</author>
<published>2018-09-26T15:18:42Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=ba61ab1a232d75a8bf92bbfedc10162a6e7e95c7'/>
<id>urn:sha1:ba61ab1a232d75a8bf92bbfedc10162a6e7e95c7</id>
<content type='text'>
arm64: zynqmp: SoC changes for v4.20

- Adding firmware API for SoC with debugfs interface
  Firmware driver communicates to Platform Management Unit (PMU) by using
  SMC instructions routed to Arm Trusted Firmware (ATF). Initial version
  adds support for base firmware driver with query and clock APIs.

  EEMI spec is available here:
  https://www.xilinx.com/support/documentation/user_guides/ug1200-eemi-api.pdf

* tag 'zynqmp-soc-for-v4.20-v2' of https://github.com/Xilinx/linux-xlnx:
  firmware: xilinx: Add debugfs for query data API
  firmware: xilinx: Add debugfs interface
  firmware: xilinx: Add clock APIs
  firmware: xilinx: Add query data API
  firmware: xilinx: Add Zynqmp firmware driver
  dt-bindings: firmware: Add bindings for ZynqMP firmware

Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
</entry>
<entry>
<title>firmware: xilinx: Add clock APIs</title>
<updated>2018-09-26T06:47:34Z</updated>
<author>
<name>Rajan Vaja</name>
<email>rajanv@xilinx.com</email>
</author>
<published>2018-09-12T19:38:38Z</published>
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<id>urn:sha1:f9627312e20721681ea326bd2b7935bf8034b288</id>
<content type='text'>
Add clock APIs to control clocks through firmware
interface.

Signed-off-by: Rajan Vaja &lt;rajanv@xilinx.com&gt;
Signed-off-by: Jolly Shah &lt;jollys@xilinx.com&gt;
Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</content>
</entry>
<entry>
<title>firmware: xilinx: Add query data API</title>
<updated>2018-09-26T06:47:33Z</updated>
<author>
<name>Rajan Vaja</name>
<email>rajanv@xilinx.com</email>
</author>
<published>2018-09-12T19:38:37Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=59ecdd778879f171072b663f91de6c3a595e2ed4'/>
<id>urn:sha1:59ecdd778879f171072b663f91de6c3a595e2ed4</id>
<content type='text'>
Add ZynqMP firmware query data API to query platform
specific information(clocks, pins) from firmware.

Signed-off-by: Rajan Vaja &lt;rajanv@xilinx.com&gt;
Signed-off-by: Jolly Shah &lt;jollys@xilinx.com&gt;
Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</content>
</entry>
<entry>
<title>firmware: xilinx: Add Zynqmp firmware driver</title>
<updated>2018-09-26T06:47:31Z</updated>
<author>
<name>Rajan Vaja</name>
<email>rajanv@xilinx.com</email>
</author>
<published>2018-09-12T19:38:36Z</published>
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<id>urn:sha1:76582671eb5d006a78420776cc5f73195b867e81</id>
<content type='text'>
This patch is adding communication layer with firmware.
Firmware driver provides an interface to firmware APIs.
Interface APIs can be used by any driver to communicate to
PMUFW(Platform Management Unit). All requests go through ATF.

Signed-off-by: Rajan Vaja &lt;rajanv@xilinx.com&gt;
Signed-off-by: Jolly Shah &lt;jollys@xilinx.com&gt;
Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</content>
</entry>
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