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<title>user/sven/linux.git/include/linux/fsl_devices.h, branch v2.6.29.2</title>
<subtitle>Linux Kernel
</subtitle>
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<updated>2008-12-16T23:29:15Z</updated>
<entry>
<title>gianfar: Convert gianfar to an of_platform_driver</title>
<updated>2008-12-16T23:29:15Z</updated>
<author>
<name>Andy Fleming</name>
<email>afleming@freescale.com</email>
</author>
<published>2008-12-16T23:29:15Z</published>
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<id>urn:sha1:b31a1d8b41513b96e9c7ec2f68c5734cef0b26a4</id>
<content type='text'>
Does the same for the accompanying MDIO driver, and then modifies the TBI
configuration method.  The old way used fields in einfo, which no longer
exists.  The new way is to create an MDIO device-tree node for each instance
of gianfar, and create a tbi-handle property to associate ethernet controllers
with the TBI PHYs they are connected to.

Signed-off-by: Andy Fleming &lt;afleming@freescale.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>gianfar: Fix race in TBI/SerDes configuration</title>
<updated>2008-10-31T04:59:46Z</updated>
<author>
<name>Trent Piepho</name>
<email>tpiepho@freescale.com</email>
</author>
<published>2008-10-31T01:17:06Z</published>
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<id>urn:sha1:c132419e560a2ecd3c8cf77f9c37e103e74b3754</id>
<content type='text'>
The init_phy() function attaches to the PHY, then configures the
SerDes&lt;-&gt;TBI link (in SGMII mode).  The TBI is on the MDIO bus with the PHY
(sort of) and is accessed via the gianfar's MDIO registers, using the
functions gfar_local_mdio_read/write(), which don't do any locking.

The previously attached PHY will start a work-queue on a timer, and
probably an irq handler as well, which will talk to the PHY and thus use
the MDIO bus.  This uses phy_read/write(), which have locking, but not
against the gfar_local_mdio versions.

The result is that PHY code will try to use the MDIO bus at the same time
as the SerDes setup code, corrupting the transfers.

Setting up the SerDes before attaching to the PHY will insure that there is
no race between the SerDes code and *our* PHY, but doesn't fix everything.
Typically the PHYs for all gianfar devices are on the same MDIO bus, which
is associated with the first gianfar device.  This means that the first
gianfar's SerDes code could corrupt the MDIO transfers for a different
gianfar's PHY.

The lock used by phy_read/write() is contained in the mii_bus structure,
which is pointed to by the PHY.  This is difficult to access from the
gianfar drivers, as there is no link between a gianfar device and the
mii_bus which shares the same MDIO registers.  As far as the device layer
and drivers are concerned they are two unrelated devices (which happen to
share registers).

Generally all gianfar devices' PHYs will be on the bus associated with the
first gianfar.  But this might not be the case, so simply locking the
gianfar's PHY's mii bus might not lock the mii bus that the SerDes setup
code is going to use.

We solve this by having the code that creates the gianfar platform device
look in the device tree for an mdio device that shares the gianfar's
registers.  If one is found the ID of its platform device is saved in the
gianfar's platform data.

A new function in the gianfar mii code, gfar_get_miibus(), can use the bus
ID to search through the platform devices for a gianfar_mdio device with
the right ID.  The platform device's driver data is the mii_bus structure,
which the SerDes setup code can use to lock the current bus.

Signed-off-by: Trent Piepho &lt;tpiepho@freescale.com&gt;
CC: Andy Fleming &lt;afleming@freescale.com&gt;
Signed-off-by: Jeff Garzik &lt;jgarzik@redhat.com&gt;
</content>
</entry>
<entry>
<title>gianfar: Add magic packet and suspend/resume support.</title>
<updated>2008-07-16T22:57:47Z</updated>
<author>
<name>Scott Wood</name>
<email>scottwood@freescale.com</email>
</author>
<published>2008-07-11T23:04:45Z</published>
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<id>urn:sha1:d87eb12785c14de1586e3bad86ca2c0991300339</id>
<content type='text'>
Signed-off-by: Scott Wood &lt;scottwood@freescale.com&gt;
Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
</content>
</entry>
<entry>
<title>powerpc/mpc83xx: Power Management support</title>
<updated>2008-07-16T22:57:30Z</updated>
<author>
<name>Scott Wood</name>
<email>scottwood@freescale.com</email>
</author>
<published>2007-10-09T17:37:13Z</published>
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<id>urn:sha1:d49747bdfb2ddebea24d1580da55b79d093d48a9</id>
<content type='text'>
Basic PM support for 83xx.  Standby is implemented as sleep.
Suspend-to-RAM is implemented as "deep sleep" (with the processor
turned off) on 831x.

Signed-off-by: Scott Wood &lt;scottwood@freescale.com&gt;
Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
</content>
</entry>
<entry>
<title>Remove "#ifdef __KERNEL__" checks from unexported headers</title>
<updated>2008-04-30T15:29:54Z</updated>
<author>
<name>Robert P. J. Day</name>
<email>rpjday@crashcourse.ca</email>
</author>
<published>2008-04-30T07:55:12Z</published>
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<id>urn:sha1:735643ee6cc5249bfac07fcad0946a5e7aff4423</id>
<content type='text'>
Remove the "#ifdef __KERNEL__" tests from unexported header files in
linux/include whose entire contents are wrapped in that preprocessor
test.

Signed-off-by: Robert P. J. Day &lt;rpjday@crashcourse.ca&gt;
Cc: David Woodhouse &lt;dwmw2@infradead.org&gt;
Cc: Sam Ravnborg &lt;sam@ravnborg.org&gt;
Signed-off-by: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</content>
</entry>
<entry>
<title>phy: Change mii_bus id field to a string</title>
<updated>2008-04-17T00:09:35Z</updated>
<author>
<name>Andy Fleming</name>
<email>afleming@freescale.com</email>
</author>
<published>2008-04-10T00:38:13Z</published>
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<id>urn:sha1:9d9326d3bc0ea9a8bbe40bf3e5e66c7b9858caa0</id>
<content type='text'>
Having the id field be an int was making more complex bus topologies
excessively difficult.  For now, just convert it to a string, and
change all instances of "bus-&gt;id = val" to
snprintf(id, MII_BUS_ID_LEN, "%x", val).

Signed-off-by: Andy Fleming &lt;afleming@freescale.com&gt;
Signed-off-by: Jeff Garzik &lt;jgarzik@redhat.com&gt;
</content>
</entry>
<entry>
<title>Fix RGMII-ID handling in gianfar</title>
<updated>2007-07-18T22:29:37Z</updated>
<author>
<name>Andy Fleming</name>
<email>afleming@freescale.com</email>
</author>
<published>2007-07-11T16:43:07Z</published>
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<id>urn:sha1:7132ab7f6e0309bb8e0424e395ba149aee0c750e</id>
<content type='text'>
The TSEC/eTSEC can detect the interface to the PHY automatically,
but it isn't able to detect whether the RGMII connection needs internal
delay.  So we need to detect that change in the device tree, propagate
it to the platform data, and then check it if we're in RGMII.  This fixes
a bug on the 8641D HPCN board where the Vitesse PHY doesn't use the delay
for RGMII.

Signed-off-by: Andy Fleming &lt;afleming@freescale.com&gt;
</content>
</entry>
<entry>
<title>spi_mpc83xx.c: support QE enabled 83xx CPU's like mpc832x</title>
<updated>2007-07-17T17:23:05Z</updated>
<author>
<name>Joakim Tjernlund</name>
<email>joakim.tjernlund@transmode.se</email>
</author>
<published>2007-07-17T11:04:12Z</published>
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<id>urn:sha1:f29ba280ecb46331c1f6842b094808af01131422</id>
<content type='text'>
Quicc Engine enabled mpc83xx CPU's has a somewhat different HW interface to
the SPI controller.  This patch adds a qe_mode knob that sees to that
needed adaptions are performed.

Signed-off-by: Joakim Tjernlund &lt;Joakim.Tjernlund@transmode.se&gt;
Signed-off-by: David Brownell &lt;dbrownell@users.sourceforge.net&gt;
Signed-off-by: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</content>
</entry>
<entry>
<title>[POWERPC] 8xx: mpc885ads pcmcia support</title>
<updated>2007-07-10T05:33:51Z</updated>
<author>
<name>Vitaly Bordug</name>
<email>vitb@kernel.crashing.org</email>
</author>
<published>2007-07-09T18:37:35Z</published>
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<id>urn:sha1:80128ff79d282cf71b1819dbca9b8dd47d8ed3e8</id>
<content type='text'>
Adds support for PowerQuicc on-chip PCMCIA.  The driver is implemented as
of_device, so only arch/powerpc stuff is capable to use it, which now implies
only mpc885ads reference board.

To cope with the code that should be hooked inside driver, but is really board
specific (like set_voltage), global structure mpc8xx_pcmcia_ops holds
necessary function pointers that are filled in the BSP code.

[akpm@linux-foundation.org: whitespace diddles]
Signed-off-by: Vitaly Bordug &lt;vitb@kernel.crashing.org&gt;
Acked-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Acked-by: Olof Johansson &lt;olof@lixom.net&gt;
Cc: Dominik Brodowski &lt;linux@dominikbrodowski.net&gt;
Cc: Paul Mackerras &lt;paulus@samba.org&gt;
Cc: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
Signed-off-by: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
</content>
</entry>
<entry>
<title>ucc_geth: migrate ucc_geth to phylib</title>
<updated>2007-04-28T15:01:04Z</updated>
<author>
<name>Kim Phillips</name>
<email>kim.phillips@freescale.com</email>
</author>
<published>2007-04-13T06:26:03Z</published>
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<id>urn:sha1:728de4c927a3544b6d3da331b634035d4c75ca17</id>
<content type='text'>
migrate ucc_geth to use the common phylib code.

There are several side effects from doing this:

o deprecate 'interface' property specification present
  in some old device tree source files in
  favour of a split 'max-speed' and 'interface-type'
  description to appropriately match definitions
  in include/linux/phy.h.  Note that 'interface' property
  is still honoured if max-speed or interface-type
  are not present (backward compatible).
o compile-time CONFIG_UGETH_HAS_GIGA is eliminated
  in favour of probe time speed derivation logic.
o adjust_link streamlined to only operate on maccfg2
  and upsmr.r10m, instead of reapplying static initial
  values related to the interface-type.
o Addition of UEC MDIO of_platform driver requires
  platform code add 'mdio' type to id list
  prior to calling of_platform_bus_probe (separate patch).
o ucc_struct_init introduced to reduce ucc_geth_startup
  complexity.

Signed-off-by: Li Yang &lt;leoli@freescale.com&gt;
Signed-off-by: Kim Phillips &lt;kim.phillips@freescale.com&gt;
Signed-off-by: Jeff Garzik &lt;jeff@garzik.org&gt;
</content>
</entry>
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