user/sven/linux.git/include/linux/gpio/driver.h, branch v4.4.194

gpiolib: provide generic request/free implementations

2015-10-16T20:11:16Z

Provide generic request/free implementations that pinctrl aware gpio drivers can use instead of open coding if they use a 1:1 pin to gpio signal mapping. Signed-off-by: Jonas Gorski Signed-off-by: Linus Walleij

gpiolib: add description for gpio irqchip fields in struct gpio_chip

2015-08-26T07:29:50Z

Add missed description for GPIO irqchip fields in struct gpio_chip. Signed-off-by: Grygorii Strashko Signed-off-by: Linus Walleij

gpiolib: irqchip: use different lockdep class for each gpio irqchip

2015-08-17T13:32:03Z

Since IRQ chip helpers were introduced drivers lose ability to register separate lockdep classes for each registered GPIO IRQ chip and the gpiolib now is using shared lockdep class for all GPIO IRQ chips (gpiochip_irq_lock_class). As result, lockdep will produce warning when there are min two stacked GPIO chips and all of them are interrupt controllers. HW configuration which generates lockdep warning (TI dra7-evm): [SOC GPIO bankA.gpioX] <- irq - [pcf875x.gpioY] <- irq - DevZ.enable_irq_wake(pcf_gpioY_irq); The issue was reported in [1] and discussed [2]. ============================================= [ INFO: possible recursive locking detected ] 4.2.0-rc6-00013-g5d050ed-dirty #55 Not tainted --------------------------------------------- sh/63 is trying to acquire lock: (class){......}, at: [] __irq_get_desc_lock+0x50/0x94 but task is already holding lock: (class){......}, at: [] __irq_get_desc_lock+0x50/0x94 other info that might help us debug this: Possible unsafe locking scenario: CPU0 ---- lock(class); lock(class); *** DEADLOCK *** May be due to missing lock nesting notation 7 locks held by sh/63: #0: (sb_writers#4){.+.+.+}, at: [] vfs_write+0x13c/0x164 #1: (&of->mutex){+.+.+.}, at: [] kernfs_fop_write+0x4c/0x1a0 #2: (s_active#36){.+.+.+}, at: [] kernfs_fop_write+0x54/0x1a0 #3: (pm_mutex){+.+.+.}, at: [] pm_suspend+0xec/0x4c4 #4: (&dev->mutex){......}, at: [] __device_suspend+0xd4/0x398 #5: (&gpio->lock){+.+.+.}, at: [] __irq_get_desc_lock+0x74/0x94 #6: (class){......}, at: [] __irq_get_desc_lock+0x50/0x94 stack backtrace: CPU: 0 PID: 63 Comm: sh Not tainted 4.2.0-rc6-00013-g5d050ed-dirty #55 Hardware name: Generic DRA74X (Flattened Device Tree) [] (unwind_backtrace) from [] (show_stack+0x10/0x14) [] (show_stack) from [] (dump_stack+0x84/0x9c) [] (dump_stack) from [] (__lock_acquire+0x19c0/0x1e20) [] (__lock_acquire) from [] (lock_acquire+0xa8/0x128) [] (lock_acquire) from [] (_raw_spin_lock_irqsave+0x38/0x4c) [] (_raw_spin_lock_irqsave) from [] (__irq_get_desc_lock+0x50/0x94) [] (__irq_get_desc_lock) from [] (irq_set_irq_wake+0x20/0xfc) [] (irq_set_irq_wake) from [] (pcf857x_irq_set_wake+0x24/0x54) [] (pcf857x_irq_set_wake) from [] (irq_set_irq_wake+0x8c/0xfc) [] (irq_set_irq_wake) from [] (gpio_keys_suspend+0x70/0xd4) [] (gpio_keys_suspend) from [] (dpm_run_callback+0x50/0x124) [] (dpm_run_callback) from [] (__device_suspend+0x10c/0x398) [] (__device_suspend) from [] (dpm_suspend+0x134/0x2f4) [] (dpm_suspend) from [] (suspend_devices_and_enter+0xa8/0x728) [] (suspend_devices_and_enter) from [] (pm_suspend+0x32c/0x4c4) [] (pm_suspend) from [] (state_store+0x64/0xb8) [] (state_store) from [] (kernfs_fop_write+0xbc/0x1a0) [] (kernfs_fop_write) from [] (__vfs_write+0x20/0xd8) [] (__vfs_write) from [] (vfs_write+0x90/0x164) [] (vfs_write) from [] (SyS_write+0x44/0x9c) [] (SyS_write) from [] (ret_fast_syscall+0x0/0x54) Lets fix it by using separate lockdep class for each registered GPIO IRQ Chip. This is done by wrapping gpiochip_irqchip_add call into macros. The implementation of this patch inspired by solution done by Nicolas Boichat for regmap [3] [1] http://www.spinics.net/lists/linux-gpio/msg05844.html [2] http://www.spinics.net/lists/linux-gpio/msg06021.html [3] http://www.spinics.net/lists/arm-kernel/msg429834.html Cc: Geert Uytterhoeven Cc: Roger Quadros Reported-by: Roger Quadros Tested-by: Roger Quadros Signed-off-by: Grygorii Strashko Signed-off-by: Linus Walleij

gpio: Remove double "base" in comment

2015-07-15T22:12:24Z

Signed-off-by: Geert Uytterhoeven Signed-off-by: Linus Walleij

gpio: discourage passing base to gpio_chip

2015-05-14T10:19:48Z

Passing a fixed base in struct gpio_chip is done for legacy systems that cannot handle dynamic allocation. Discourage this behaviour in the kerneldoc. Acked-by: Alexandre Courbot Signed-off-by: Linus Walleij

gpiolib: cleanup chained handler and data

2015-05-13T11:02:36Z

Clean up chained handler and handler data if they were set by gpiochip_set_chained_irqchip(). Signed-off-by: Dmitry Eremin-Solenikov Signed-off-by: Linus Walleij

gpio: sysfs: clean up chip class-device handling

2015-05-12T08:46:44Z

Clean gpio-chip class device registration and deregistration. The class device is registered when a gpio-chip is added (or from gpiolib_sysfs_init post-core init call), and deregistered when the chip is removed. Store the class device in struct gpio_chip directly rather than do a class-device lookup on deregistration. This also removes the need for the exported flag. Signed-off-by: Johan Hovold Reviewed-by: Alexandre Courbot Signed-off-by: Linus Walleij

gpio: move pincontrol calls to

2015-03-19T08:45:54Z

These functions do not belong in since the split into separate GPIO headers under . Move them to as is apropriate. Acked-by: Alexandre Courbot Signed-off-by: Linus Walleij

gpiolib: allow simultaneous setting of multiple GPIO outputs

2014-11-27T14:01:18Z

Introduce new functions gpiod_set_array & gpiod_set_raw_array to the consumer interface which allow setting multiple outputs with just one function call. Also add an optional set_multiple function to the driver interface. Without an implementation of that function in the chip driver outputs are set sequentially. Implementing the set_multiple function in a chip driver allows for: - Improved performance for certain use cases. The original motivation for this was the task of configuring an FPGA. In that specific case, where 9 GPIO lines have to be set many times, configuration time goes down from 48 s to 20 s when using the new function. - Simultaneous glitch-free setting of multiple pins on any kind of parallel bus attached to GPIOs provided they all reside on the same chip and bank. Limitations: Performance is only improved for normal high-low outputs. Open drain and open source outputs are always set separately from each other. Those kinds of outputs could probably be accelerated in a similar way if we could forgo the error checking when setting GPIO directions. Change log: v6: - rebase on current linux-gpio devel branch v5: - check can_sleep property per chip - remove superfluous checks - supplement documentation v4: - add gpiod_set_array function for setting logical values - change interface of the set_multiple driver function to use unsigned long as type for the bit fields - use generic bitops (which also use unsigned long for bit fields) - do not use ARCH_NR_GPIOS any more v3: - add documentation - change commit message v2: - use descriptor interface - allow arbitrary groups of GPIOs spanning multiple chips Signed-off-by: Rojhalat Ibrahim Reviewed-by: Alexandre Courbot Reviewed-by: Mark Brown Signed-off-by: Linus Walleij

gpio: rename gpio_lock_as_irq to gpiochip_lock_as_irq

2014-10-28T16:30:59Z

This function actually operates on a gpio_chip, so its prefix should reflect that fact for consistency with other functions defined in gpio/driver.h. Signed-off-by: Alexandre Courbot Signed-off-by: Linus Walleij