<feed xmlns='http://www.w3.org/2005/Atom'>
<title>user/sven/linux.git/include/linux/gpio, branch v4.19.274</title>
<subtitle>Linux Kernel
</subtitle>
<id>https://git.stealer.net/cgit.cgi/user/sven/linux.git/atom?h=v4.19.274</id>
<link rel='self' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/atom?h=v4.19.274'/>
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<updated>2019-12-05T08:20:15Z</updated>
<entry>
<title>gpiolib: Fix return value of gpio_to_desc() stub if !GPIOLIB</title>
<updated>2019-12-05T08:20:15Z</updated>
<author>
<name>Krzysztof Kozlowski</name>
<email>krzk@kernel.org</email>
</author>
<published>2018-12-06T09:45:49Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=06f464df98351f823c7c30c489e0e6cf15eb8d77'/>
<id>urn:sha1:06f464df98351f823c7c30c489e0e6cf15eb8d77</id>
<content type='text'>
[ Upstream commit c5510b8dafce5f3f5a039c9b262ebcae0092c462 ]

If CONFIG_GPOILIB is not set, the stub of gpio_to_desc() should return
the same type of error as regular version: NULL.  All the callers
compare the return value of gpio_to_desc() against NULL, so returned
ERR_PTR would be treated as non-error case leading to dereferencing of
error value.

Fixes: 79a9becda894 ("gpiolib: export descriptor-based GPIO interface")
Signed-off-by: Krzysztof Kozlowski &lt;krzk@kernel.org&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>gpio: don't WARN() on NULL descs if gpiolib is disabled</title>
<updated>2019-09-16T06:22:22Z</updated>
<author>
<name>Bartosz Golaszewski</name>
<email>bgolaszewski@baylibre.com</email>
</author>
<published>2019-07-08T08:23:43Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=c9c90711ee88429766dc3c7a942c8d1905bb0113'/>
<id>urn:sha1:c9c90711ee88429766dc3c7a942c8d1905bb0113</id>
<content type='text'>
[ Upstream commit ffe0bbabb0cffceceae07484fde1ec2a63b1537c ]

If gpiolib is disabled, we use the inline stubs from gpio/consumer.h
instead of regular definitions of GPIO API. The stubs for 'optional'
variants of gpiod_get routines return NULL in this case as if the
relevant GPIO wasn't found. This is correct so far.

Calling other (non-gpio_get) stubs from this header triggers a warning
because the GPIO descriptor couldn't have been requested. The warning
however is unconditional (WARN_ON(1)) and is emitted even if the passed
descriptor pointer is NULL.

We don't want to force the users of 'optional' gpio_get to check the
returned pointer before calling e.g. gpiod_set_value() so let's only
WARN on non-NULL descriptors.

Cc: stable@vger.kernel.org
Reported-by: Claus H. Stovgaard &lt;cst@phaseone.com&gt;
Signed-off-by: Bartosz Golaszewski &lt;bgolaszewski@baylibre.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>gpiolib: Fix possible use after free on label</title>
<updated>2019-02-12T18:46:57Z</updated>
<author>
<name>Muchun Song</name>
<email>smuchun@gmail.com</email>
</author>
<published>2018-11-01T13:12:50Z</published>
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<id>urn:sha1:3555de57dca4e8881a4d791b2508709ed37e27ad</id>
<content type='text'>
[ Upstream commit 18534df419041e6c1f4b41af56ee7d41f757815c ]

gpiod_request_commit() copies the pointer to the label passed as
an argument only to be used later. But there's a chance the caller
could immediately free the passed string(e.g., local variable).
This could trigger a use after free when we use gpio label(e.g.,
gpiochip_unlock_as_irq(), gpiochip_is_requested()).

To be on the safe side: duplicate the string with kstrdup_const()
so that if an unaware user passes an address to a stack-allocated
buffer, we won't get the arbitrary label.

Also fix gpiod_set_consumer_name().

Signed-off-by: Muchun Song &lt;smuchun@gmail.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>gpio: Assign gpio_irq_chip::parents to non-stack pointer</title>
<updated>2018-10-10T12:03:27Z</updated>
<author>
<name>Stephen Boyd</name>
<email>swboyd@chromium.org</email>
</author>
<published>2018-10-08T16:32:13Z</published>
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<id>urn:sha1:3e779a2e7f909015f21428b66834127496110b6d</id>
<content type='text'>
gpiochip_set_cascaded_irqchip() is passed 'parent_irq' as an argument
and then the address of that argument is assigned to the gpio chips
gpio_irq_chip 'parents' pointer shortly thereafter. This can't ever
work, because we've just assigned some stack address to a pointer that
we plan to dereference later in gpiochip_irq_map(). I ran into this
issue with the KASAN report below when gpiochip_irq_map() tried to setup
the parent irq with a total junk pointer for the 'parents' array.

BUG: KASAN: stack-out-of-bounds in gpiochip_irq_map+0x228/0x248
Read of size 4 at addr ffffffc0dde472e0 by task swapper/0/1

CPU: 7 PID: 1 Comm: swapper/0 Not tainted 4.14.72 #34
Call trace:
[&lt;ffffff9008093638&gt;] dump_backtrace+0x0/0x718
[&lt;ffffff9008093da4&gt;] show_stack+0x20/0x2c
[&lt;ffffff90096b9224&gt;] __dump_stack+0x20/0x28
[&lt;ffffff90096b91c8&gt;] dump_stack+0x80/0xbc
[&lt;ffffff900845a350&gt;] print_address_description+0x70/0x238
[&lt;ffffff900845a8e4&gt;] kasan_report+0x1cc/0x260
[&lt;ffffff900845aa14&gt;] __asan_report_load4_noabort+0x2c/0x38
[&lt;ffffff900897e098&gt;] gpiochip_irq_map+0x228/0x248
[&lt;ffffff900820cc08&gt;] irq_domain_associate+0x114/0x2ec
[&lt;ffffff900820d13c&gt;] irq_create_mapping+0x120/0x234
[&lt;ffffff900820da78&gt;] irq_create_fwspec_mapping+0x4c8/0x88c
[&lt;ffffff900820e2d8&gt;] irq_create_of_mapping+0x180/0x210
[&lt;ffffff900917114c&gt;] of_irq_get+0x138/0x198
[&lt;ffffff9008dc70ac&gt;] spi_drv_probe+0x94/0x178
[&lt;ffffff9008ca5168&gt;] driver_probe_device+0x51c/0x824
[&lt;ffffff9008ca6538&gt;] __device_attach_driver+0x148/0x20c
[&lt;ffffff9008ca14cc&gt;] bus_for_each_drv+0x120/0x188
[&lt;ffffff9008ca570c&gt;] __device_attach+0x19c/0x2dc
[&lt;ffffff9008ca586c&gt;] device_initial_probe+0x20/0x2c
[&lt;ffffff9008ca18bc&gt;] bus_probe_device+0x80/0x154
[&lt;ffffff9008c9b9b4&gt;] device_add+0x9b8/0xbdc
[&lt;ffffff9008dc7640&gt;] spi_add_device+0x1b8/0x380
[&lt;ffffff9008dcbaf0&gt;] spi_register_controller+0x111c/0x1378
[&lt;ffffff9008dd6b10&gt;] spi_geni_probe+0x4dc/0x6f8
[&lt;ffffff9008cab058&gt;] platform_drv_probe+0xdc/0x130
[&lt;ffffff9008ca5168&gt;] driver_probe_device+0x51c/0x824
[&lt;ffffff9008ca59cc&gt;] __driver_attach+0x100/0x194
[&lt;ffffff9008ca0ea8&gt;] bus_for_each_dev+0x104/0x16c
[&lt;ffffff9008ca58c0&gt;] driver_attach+0x48/0x54
[&lt;ffffff9008ca1edc&gt;] bus_add_driver+0x274/0x498
[&lt;ffffff9008ca8448&gt;] driver_register+0x1ac/0x230
[&lt;ffffff9008caaf6c&gt;] __platform_driver_register+0xcc/0xdc
[&lt;ffffff9009c4b33c&gt;] spi_geni_driver_init+0x1c/0x24
[&lt;ffffff9008084cb8&gt;] do_one_initcall+0x240/0x3dc
[&lt;ffffff9009c017d0&gt;] kernel_init_freeable+0x378/0x468
[&lt;ffffff90096e8240&gt;] kernel_init+0x14/0x110
[&lt;ffffff9008086fcc&gt;] ret_from_fork+0x10/0x18

The buggy address belongs to the page:
page:ffffffbf037791c0 count:0 mapcount:0 mapping:          (null) index:0x0
flags: 0x4000000000000000()
raw: 4000000000000000 0000000000000000 0000000000000000 00000000ffffffff
raw: ffffffbf037791e0 ffffffbf037791e0 0000000000000000 0000000000000000
page dumped because: kasan: bad access detected

Memory state around the buggy address:
 ffffffc0dde47180: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 ffffffc0dde47200: f1 f1 f1 f1 f8 f8 f8 f8 f8 f8 f8 f8 f8 f8 f2 f2
&gt;ffffffc0dde47280: f2 f2 00 00 00 00 00 00 00 00 00 00 f3 f3 f3 f3
                                                       ^
 ffffffc0dde47300: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 ffffffc0dde47380: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

Let's leave around one unsigned int in the gpio_irq_chip struct for the
single parent irq case and repoint the 'parents' array at it. This way
code is left mostly intact to setup parents and we waste an extra few
bytes per structure of which there should be only a handful in a system.

Cc: Evan Green &lt;evgreen@chromium.org&gt;
Cc: Thierry Reding &lt;treding@nvidia.com&gt;
Cc: Grygorii Strashko &lt;grygorii.strashko@ti.com&gt;
Fixes: e0d897289813 ("gpio: Implement tighter IRQ chip integration")
Signed-off-by: Stephen Boyd &lt;swboyd@chromium.org&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>gpio: mmio: Fix up inverted direction registers</title>
<updated>2018-08-10T21:19:17Z</updated>
<author>
<name>Linus Walleij</name>
<email>linus.walleij@linaro.org</email>
</author>
<published>2018-08-02T22:52:18Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=d799a4de0a250f1bdd99765bb8e55a5e2f469a1f'/>
<id>urn:sha1:d799a4de0a250f1bdd99765bb8e55a5e2f469a1f</id>
<content type='text'>
The bgpio_init() takes one of two arguments to specify a register
to set the direction of the GPIO line: either dirout that
indicates that a 1 in the bit in that register sets the
corresponding line to output, or dirin which indicates that
a 1 in the bit in that register sets the corresponding line to
input. Conversely setting the bit to 0 on these will turn the
line into input and output respectively. One of these can
be defined but not both.

This means that a platform that sets a bit to 1 for output
only defines dirout and a platform that sets a bit to 0 for
output only defines dirin. In short this defines the polarity
of the direction register.

Both can also be left as NULL meaning the GPIO chip is either
input only or output only.

Tomer Maimon discovered that for get/set chips (those where the
get and set registers are defined but no separate clear register,
and specifying BGPIOF_READ_OUTPUT_REG_SET so that we say we
want to read the output value from the SET register)
we are unconditionally reading the value from the SET register
when the direction bit is 1 and from the DAT register when the
direction bit is 0, not taking the direction bit polarity into
account.

It would be expected that when the direction bit is inverted
(dirin is defined but not dirout) we read the current value from
the DAT register when the bit is 1 and from the SET register
when the bit is 0.

Currently only some versions of ATH79, brcmstb, some versions of
CLP711x, GE, IOP and Loongson use the dirin mode (a 1 in the
register means input). They are unaffected because
BGPIOF_READ_OUTPUT_REG_SET is not set on any of them. (They
do not read back the SET register to figure out the output
value.) So this is no regression with current drivers.

However the behaviour is wrong and does not work with Tomer's
new driver where he needs to use the BGIOF_READ_OUTPUT_REG_SET.
This fixes the above issue by:

- Instead of defining separate functions for the inverted case,
  set up a flag in the gpio_chip that indicates that the
  direction is inverted.
- Remove the special inverted functions for setting
  input/output and getting the direction, rely on the flag
  instead.
- Respect this flag in bgpio_get_set() and
  bgpio_get_set_multiple()

Reported-by: Tomer Maimon &lt;tmaimon77@gmail.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>gpiolib: Use GPIOD_OUT_{LOW,HIGH} macros in open drain ones</title>
<updated>2018-07-29T22:06:33Z</updated>
<author>
<name>Andy Shevchenko</name>
<email>andriy.shevchenko@linux.intel.com</email>
</author>
<published>2018-07-27T14:47:01Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=0969a204bfdaf7470d2666736b90a8595ae671e9'/>
<id>urn:sha1:0969a204bfdaf7470d2666736b90a8595ae671e9</id>
<content type='text'>
There should not be anything more than stated by the name of newly
introduced constants, i.e.
	GPIOD_OUT_LOW_OPEN_DRAIN == GPIOD_OUT_LOW + open drain
and nothing more.

Make it better to read and slightly more robust by using GPIOD_OUT_LOW
and GPIOD_OUT_HIGH constants with open drain flag.

No functional change intended.

Signed-off-by: Andy Shevchenko &lt;andriy.shevchenko@linux.intel.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>Merge branch 'ib-aspeed' into devel</title>
<updated>2018-07-02T14:10:25Z</updated>
<author>
<name>Linus Walleij</name>
<email>linus.walleij@linaro.org</email>
</author>
<published>2018-07-02T14:10:25Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=2b6c83cad13d12b3561e7ae9e7505b3c831c6fce'/>
<id>urn:sha1:2b6c83cad13d12b3561e7ae9e7505b3c831c6fce</id>
<content type='text'>
</content>
</entry>
<entry>
<title>gpio: aspeed: Add interfaces for co-processor to grab GPIOs</title>
<updated>2018-07-02T14:10:15Z</updated>
<author>
<name>Benjamin Herrenschmidt</name>
<email>benh@kernel.crashing.org</email>
</author>
<published>2018-06-29T04:11:19Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=a7ca13826e478f9b201eb2f9f20de0b978a82ad9'/>
<id>urn:sha1:a7ca13826e478f9b201eb2f9f20de0b978a82ad9</id>
<content type='text'>
On the Aspeed chip, the GPIOs can be under control of the ARM
chip or of the ColdFire coprocessor. (There's a third command
source, the LPC bus, which we don't use or support yet).

The control of which master is allowed to modify a given
GPIO is per-bank (8 GPIOs).

Unfortunately, systems already exist for which we want to
use GPIOs of both sources in the same bank.

This provides an API exported by the gpio-aspeed driver
that an aspeed coprocessor driver can use to "grab" some
GPIOs for use by the coprocessor, and allow the coprocessor
driver to provide callbacks for arbitrating access.

Once at least one GPIO of a given bank has been "grabbed"
by the coprocessor, the entire bank is marked as being
under coprocessor control. It's command source is switched
to the coprocessor.

If the ARM then tries to write to a GPIO in such a marked bank,
the provided callbacks are used to request access from the
coprocessor driver, which is responsible to doing whatever
is necessary to "pause" the coprocessor or prevent it from
trying to use the GPIOs while the ARM is doing its accesses.

During that time, the command source for the bank is temporarily
switched back to the ARM.

Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
Reviewed-by: Joel Stanley &lt;joel@jms.id.au&gt;
Reviewed-by: Andrew Jeffery &lt;andrew@aj.id.au&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>gpio: Add API to explicitly name a consumer</title>
<updated>2018-06-18T05:55:30Z</updated>
<author>
<name>Linus Walleij</name>
<email>linus.walleij@linaro.org</email>
</author>
<published>2018-06-01T11:21:27Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=90b39402e9f31c4aab48dc1a43d85a724065793f'/>
<id>urn:sha1:90b39402e9f31c4aab48dc1a43d85a724065793f</id>
<content type='text'>
The GPIO (descriptor) API registers a "label" naming what is
currently using the GPIO line. Typically this is taken from
things like the device tree node, so "reset-gpios" will result
in he line being labeled "reset".

The technical effect is pretty much zero: the use is for
debug and introspection, such as "lsgpio" and debugfs files.

However sometimes the user want this cuddly feeling of
listing all GPIO lines and seeing exactly what they are for
and it gives a very fulfilling sense of control. Especially
in the cases when the device tree node doesn't provide a
good name, or anonymous GPIO lines assigned just to
"gpios" in the device tree because the usage is implicit.

For these cases it may be nice to be able to label the
line directly and explicitly.

Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>gpio: Remove VLA from gpiolib</title>
<updated>2018-05-23T12:01:03Z</updated>
<author>
<name>Laura Abbott</name>
<email>labbott@redhat.com</email>
</author>
<published>2018-05-21T17:57:07Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=3027743f83f867d85662f5134e835c2e199cb9be'/>
<id>urn:sha1:3027743f83f867d85662f5134e835c2e199cb9be</id>
<content type='text'>
The new challenge is to remove VLAs from the kernel
(see https://lkml.org/lkml/2018/3/7/621) to eventually
turn on -Wvla.

Using a kmalloc array is the easy way to fix this but kmalloc is still
more expensive than stack allocation. Introduce a fast path with a
fixed size stack array to cover most chip with gpios below some fixed
amount. The slow path dynamically allocates an array to cover those
chips with a large number of gpios.

Reviewed-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Reviewed-by: Phil Reid &lt;preid@electromag.com.au&gt;
Reviewed-and-tested-by: Lukas Wunner &lt;lukas@wunner.de&gt;
Signed-off-by: Lukas Wunner &lt;lukas@wunner.de&gt;
Signed-off-by: Laura Abbott &lt;labbott@redhat.com&gt;
Reviewed-by: Andy Shevchenko &lt;andy.shevchenko@gmail.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
</feed>
