<feed xmlns='http://www.w3.org/2005/Atom'>
<title>user/sven/linux.git/include/linux/intel-iommu.h, branch tmp/leds/core</title>
<subtitle>Linux Kernel
</subtitle>
<id>https://git.stealer.net/cgit.cgi/user/sven/linux.git/atom?h=tmp%2Fleds%2Fcore</id>
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<updated>2009-01-03T13:11:08Z</updated>
<entry>
<title>VT-d: remove now unused intel_iommu_found function</title>
<updated>2009-01-03T13:11:08Z</updated>
<author>
<name>Joerg Roedel</name>
<email>joerg.roedel@amd.com</email>
</author>
<published>2008-12-03T14:26:42Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=e4754c96cf8b82a754dc5ba791d6c0bf1fbe8e8e'/>
<id>urn:sha1:e4754c96cf8b82a754dc5ba791d6c0bf1fbe8e8e</id>
<content type='text'>
Signed-off-by: Joerg Roedel &lt;joerg.roedel@amd.com&gt;
</content>
</entry>
<entry>
<title>VT-d: adapt domain iova_to_phys function for IOMMU API</title>
<updated>2009-01-03T13:11:08Z</updated>
<author>
<name>Joerg Roedel</name>
<email>joerg.roedel@amd.com</email>
</author>
<published>2008-12-03T14:06:57Z</published>
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<id>urn:sha1:d14d65777c2491dd5baf1e17f444b8f653f3cbb1</id>
<content type='text'>
Signed-off-by: Joerg Roedel &lt;joerg.roedel@amd.com&gt;
</content>
</entry>
<entry>
<title>VT-d: adapt domain map and unmap functions for IOMMU API</title>
<updated>2009-01-03T13:11:08Z</updated>
<author>
<name>Joerg Roedel</name>
<email>joerg.roedel@amd.com</email>
</author>
<published>2008-12-03T14:04:09Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=dde57a210dcdce85e2813bab8f88687761d9f6a6'/>
<id>urn:sha1:dde57a210dcdce85e2813bab8f88687761d9f6a6</id>
<content type='text'>
Signed-off-by: Joerg Roedel &lt;joerg.roedel@amd.com&gt;
</content>
</entry>
<entry>
<title>VT-d: adapt device attach and detach functions for IOMMU API</title>
<updated>2009-01-03T13:11:08Z</updated>
<author>
<name>Joerg Roedel</name>
<email>joerg.roedel@amd.com</email>
</author>
<published>2008-12-03T13:58:24Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=4c5478c94eb29e6101f1f13175f7455bc8b5d953'/>
<id>urn:sha1:4c5478c94eb29e6101f1f13175f7455bc8b5d953</id>
<content type='text'>
Signed-off-by: Joerg Roedel &lt;joerg.roedel@amd.com&gt;
</content>
</entry>
<entry>
<title>VT-d: adapt domain init and destroy functions for IOMMU API</title>
<updated>2009-01-03T13:11:07Z</updated>
<author>
<name>Joerg Roedel</name>
<email>joerg.roedel@amd.com</email>
</author>
<published>2008-12-03T13:52:32Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=5d450806eb0e569c5846a5825e7f535980b0da32'/>
<id>urn:sha1:5d450806eb0e569c5846a5825e7f535980b0da32</id>
<content type='text'>
Signed-off-by: Joerg Roedel &lt;joerg.roedel@amd.com&gt;
</content>
</entry>
<entry>
<title>Change intel iommu APIs of virtual machine domain</title>
<updated>2009-01-03T13:02:18Z</updated>
<author>
<name>Weidong Han</name>
<email>weidong.han@intel.com</email>
</author>
<published>2008-12-08T15:09:29Z</published>
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<id>urn:sha1:faa3d6f5ffe7bf60ebfd0d36513fbcda0eb0ea1a</id>
<content type='text'>
These APIs are used by KVM to use VT-d

Signed-off-by: Weidong Han &lt;weidong.han@intel.com&gt;
Signed-off-by: Joerg Roedel &lt;joerg.roedel@amd.com&gt;
</content>
</entry>
<entry>
<title>calculate agaw for each iommu</title>
<updated>2009-01-03T13:02:18Z</updated>
<author>
<name>Weidong Han</name>
<email>weidong.han@intel.com</email>
</author>
<published>2008-12-08T07:34:06Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=1b5736839ae13dadc5947940144f95dd0f4a4a8c'/>
<id>urn:sha1:1b5736839ae13dadc5947940144f95dd0f4a4a8c</id>
<content type='text'>
"SAGAW" capability may be different across iommus. Use a default agaw, but if default agaw is not supported in some iommus, choose a less supported agaw.

Signed-off-by: Weidong Han &lt;weidong.han@intel.com&gt;
Signed-off-by: Joerg Roedel &lt;joerg.roedel@amd.com&gt;
</content>
</entry>
<entry>
<title>intel-iommu: remove some unused struct intel_iommu fields</title>
<updated>2009-01-03T10:57:34Z</updated>
<author>
<name>Mark McLoughlin</name>
<email>markmc@redhat.com</email>
</author>
<published>2008-11-20T14:04:20Z</published>
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<id>urn:sha1:015ab17dc2e9de805c26e74f498b12ee5e8de07e</id>
<content type='text'>
The seg, saved_msg and sysdev fields appear to be unused since
before the code was first merged.

linux/msi.h is not needed in linux/intel-iommu.h anymore since
there is no longer a reference to struct msi_msg. The MSI code
in drivers/pci/intel-iommu.c still has linux/msi.h included
via linux/dmar.h.

linux/sysdev.h isn't needed because there is no reference to
struct sys_device.

Signed-off-by: Mark McLoughlin &lt;markmc@redhat.com&gt;
Signed-off-by: David Woodhouse &lt;David.Woodhouse@intel.com&gt;
</content>
</entry>
<entry>
<title>intel-iommu: IA64 support</title>
<updated>2008-10-18T13:29:15Z</updated>
<author>
<name>Fenghua Yu</name>
<email>fenghua.yu@intel.com</email>
</author>
<published>2008-10-17T01:02:32Z</published>
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<id>urn:sha1:5b6985ce8ec7127b4d60ad450b64ca8b82748a3b</id>
<content type='text'>
The current Intel IOMMU code assumes that both host page size and Intel
IOMMU page size are 4KiB. The first patch supports variable page size.
This provides support for IA64 which has multiple page sizes.

This patch also adds some other code hooks for IA64 platform including
DMAR_OPERATION_TIMEOUT definition.

[dwmw2: some cleanup]
Signed-off-by: Fenghua Yu &lt;fenghua.yu@intel.com&gt;
Signed-off-by: Tony Luck &lt;tony.luck@intel.com&gt;
Signed-off-by: David Woodhouse &lt;David.Woodhouse@intel.com&gt;
</content>
</entry>
<entry>
<title>dmar: Use queued invalidation interface for IOTLB and context invalidation</title>
<updated>2008-10-17T07:05:01Z</updated>
<author>
<name>Youquan Song</name>
<email>youquan.song@intel.com</email>
</author>
<published>2008-10-16T23:31:56Z</published>
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<id>urn:sha1:a77b67d4023770805141014b8fa9eb5467457817</id>
<content type='text'>
If queued invalidation interface is available and enabled, queued invalidation
interface will be used instead of the register based interface.

According to Vt-d2 specification, when queued invalidation is enabled,
invalidation command submit works only through invalidation queue and not
through the command registers interface.

Signed-off-by: Youquan Song &lt;youquan.song@intel.com&gt;
Signed-off-by: Suresh Siddha &lt;suresh.b.siddha@intel.com&gt;
Signed-off-by: David Woodhouse &lt;David.Woodhouse@intel.com&gt;
</content>
</entry>
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