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<title>user/sven/linux.git/include/linux/mfd, branch v5.6.10</title>
<subtitle>Linux Kernel
</subtitle>
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<updated>2020-02-04T07:17:41Z</updated>
<entry>
<title>Merge tag 'tag-chrome-platform-for-v5.6' of git://git.kernel.org/pub/scm/linux/kernel/git/chrome-platform/linux</title>
<updated>2020-02-04T07:17:41Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2020-02-04T07:17:41Z</published>
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<id>urn:sha1:79703e014ba02ad86af4bcdf0c16e4b208cca406</id>
<content type='text'>
Pull chrome platform updates from Benson Leung:
 "CrOS EC:

   - Refactoring of some of cros_ec's headers:

     include/linux/mfd/cros_ec.h now removed, new cros_ec.h added to
     drivers/platform/chrome which contains shared operations of cros_ec
     transport drivers.

   - Response tracing in cros_ec_proto

  Wilco EC:

   - Fix unregistration order.

   - Fix keyboard backlight probing on systems without keyboard
     backlight

   - Minor cleanup (newlines in printks, COMPILE_TEST)

  Misc:

   - chromeos_laptop converted to use i2c_new_scanned_device instead of
     i2c_new_probed_device"

* tag 'tag-chrome-platform-for-v5.6' of git://git.kernel.org/pub/scm/linux/kernel/git/chrome-platform/linux:
  platform/chrome: cros_ec: Match implementation with headers
  platform/chrome: cros_ec: Drop unaligned.h include
  platform/chrome: wilco_ec: Allow wilco to be compiled in COMPILE_TEST
  platform/chrome: wilco_ec: Add newlines to printks
  platform/chrome: wilco_ec: Fix unregistration order
  cros_ec: treewide: Remove 'include/linux/mfd/cros_ec.h'
  platform/chrome: cros_ec_ishtp: Make init_lock static
  platform/chrome: chromeos_laptop: Convert to i2c_new_scanned_device
  platform/chrome: cros_ec_lpc: Use platform_get_irq_optional() for optional IRQs
  platform/chrome: cros_ec_proto: Add response tracing
  platform/chrome: cros_ec_trace: Match trace commands with EC commands
</content>
</entry>
<entry>
<title>Merge tag 'mfd-next-5.6' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd</title>
<updated>2020-02-03T14:51:57Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2020-02-03T14:51:57Z</published>
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<id>urn:sha1:af32f3a414d340b0ab92e88ffb80a19632ff345e</id>
<content type='text'>
Pull MFD updates from Lee Jones:
 "New Drivers:
   - Add support for ROHM BD71828 PMICs and GPIOs
   - Add support for Qualcomm Aqstic Audio Codecs WCD9340 and WCD9341

  New Device Support:
   - Add support for BD71828 to BD70528 RTC driver
   - Add support for Intel's Jasper Lake to LPSS PCI

  New Functionality:
   - Add support for Power Key to ROHM BD71828
   - Add support for Clocks to ROHM BD71828
   - Add support for GPIOs to Dialog DA9062
   - Add support for USB PD Notify to ChromiumOS EC
   - Allow callers to specify args when requesting regmap lookup; syscon

  Fix-ups:
   - Improve error handling and sanity checking; atmel-hlcdc, dln2
   - Device Tree support/documentation; bd71828, da9062, xylon,logicvc,
     ab8500, max14577, atmel-usart
   - Match devices using platform IDs; bd7xxxx
   - Refactor BD718x7 regulator component; bd718x7-regulator
   - Use standard interfaces/helpers; syscon, sm501
   - Trivial (whitespace, spelling, etc); ab8500-core, Kconfig
   - Remove unused code; db8500-prcmu, tqmx86
   - Wait until boot has finished before accessing registers;
     madera-core
   - Provide missing register value defaults; cs47l15-tables
   - Allow more time for hardware to reset; madera-core

  Bug Fixes:
   - Fix erroneous register values; rohm-bd70528
   - Fix register volatility; axp20x, rn5t618
   - Fix Kconfig dependencies; MFD_MAX77650
   - Fix incorrect compatible string; da9062-core
   - Fix syscon_regmap_lookup_by_phandle_args() stub; syscon"

* tag 'mfd-next-5.6' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (41 commits)
  mfd: syscon: Fix syscon_regmap_lookup_by_phandle_args() dummy
  mfd: wcd934x: Add support to wcd9340/wcd9341 codec
  mfd: syscon: Add arguments support for syscon reference
  mfd: rn5t618: Mark ADC control register volatile
  dt-bindings: atmel-usart: Add microchip,sam9x60-{usart, dbgu}
  dt-bindings: atmel-usart: Remove wildcard
  mfd: cros_ec: Add cros-usbpd-notify subdevice
  mfd: da9062: Fix watchdog compatible string
  mfd: madera: Allow more time for hardware reset
  mfd: cs47l15: Add missing register default
  mfd: madera: Wait for boot done before accessing any other registers
  mfd: Kconfig: Rename Samsung to lowercase
  mfd: tqmx86: remove set but not used variable 'i2c_ien'
  mfd: dbx500-prcmu: Drop DSI pll clock functions
  mfd: dbx500-prcmu: Drop set_display_clocks()
  mfd: max77650: Select REGMAP_IRQ in Kconfig
  mfd: axp20x: Mark AXP20X_VBUS_IPSOUT_MGMT as volatile
  mfd: ab8500: Fix ab8500-clk typo
  mfd: intel-lpss: Add Intel Jasper Lake PCI IDs
  dt-bindings: mfd: max14577: Add reference to max14040_battery.txt descriptions
  ...
</content>
</entry>
<entry>
<title>mfd: syscon: Fix syscon_regmap_lookup_by_phandle_args() dummy</title>
<updated>2020-02-03T08:39:49Z</updated>
<author>
<name>Geert Uytterhoeven</name>
<email>geert+renesas@glider.be</email>
</author>
<published>2020-01-30T12:55:29Z</published>
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<id>urn:sha1:5312f321a67cfee1fe4de245bc558fa857dce33b</id>
<content type='text'>
If CONFIG_MFD_SYSCON=n:

    include/linux/mfd/syscon.h:54:23: warning: ‘syscon_regmap_lookup_by_phandle_args’ defined but not used [-Wunused-function]

Fix this by adding the missing inline keyword.

Fixes: 6a24f567af4accef ("mfd: syscon: Add arguments support for syscon reference")
Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Signed-off-by: Lee Jones &lt;lee.jones@linaro.org&gt;
</content>
</entry>
<entry>
<title>mfd: wcd934x: Add support to wcd9340/wcd9341 codec</title>
<updated>2020-01-29T11:18:40Z</updated>
<author>
<name>Srinivas Kandagatla</name>
<email>srinivas.kandagatla@linaro.org</email>
</author>
<published>2019-12-19T10:31:44Z</published>
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<id>urn:sha1:6ac7e4d7ad70640310feedc2e5f1cb712685cb05</id>
<content type='text'>
Qualcomm WCD9340/WCD9341 Codec is a standalone Hi-Fi audio codec IC.

This codec has integrated SoundWire controller, pin controller and
interrupt controller.

Signed-off-by: Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;
Reviewed-by: Pierre-Louis Bossart &lt;pierre-louis.bossart@linux.intel.com&gt;
Signed-off-by: Lee Jones &lt;lee.jones@linaro.org&gt;
</content>
</entry>
<entry>
<title>Merge tag 'mmc-v5.6' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc</title>
<updated>2020-01-27T18:30:42Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2020-01-27T18:30:42Z</published>
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<id>urn:sha1:9e1af7567b266dc6c3c8fd434ea807b3206bfdc1</id>
<content type='text'>
Pull MMC updates from Ulf Hansson:
 "There are no updates for the MEMSTICK subsystem this time. But note
  that I am also carrying a patch from the pinctrl tree, which has been
  shared through an immutable branch.

  Summary:

  MMC core:
   - Convert to reasonable timeouts for all CMD6 commands (updates for
     BKOPS, CACHE_FLUSH and INAND_CMD38_ARG_EXT_CSD) for eMMC
   - Respect f_max clock rate at card initialization
   - Add gpiod_toggle_active_low() API
   - Consolidate slot-gpio code by using gpiod_toggle_active_low()

  MMC host:
   - Add pinctrl_select_default_state() API
   - Consolidate pintctrl code by using pinctrl_select_default_state()
   - mmci: Support any block sizes for SDIO for some variants
   - mmci: Enable reset control for stm32_sdmmc
   - mmc_spi: Toggle SPI_CS_HIGH polarity rather than hard-coding it
   - renesas_sdhi: Add support for the r8a77961 variant
   - renesas_sdhi: A few minor improvements
   - rockchip-dw-mshc: Add support for the rk3308 variant
   - sdhci: Enable support for external DMA controllers
   - sdhci: Fixup error path when sending CMD12
   - sdhci-brcmstb: Add support for 7216b0 variant
   - sdhci-brcmstb: Add support for command queuing (CQHCI)
   - sdhci-brcmstb: Add support for eMMC HS400ES mode
   - sdhci-msm: Add support for the sc7180 variant
   - sdhci-msm: Add support for command queuing (CQHCI)
   - sdhci-of-at91: Add support for the SAM9x60 variant
   - sdhci-of-at91: Improve support for tunings
   - sdhci-of-esdhc: A few fixups for some clock related issues
   - sdhci-omap: Add support for the am335x and the am437x variants
   - sdhci-omap: Improve support for erase operations
   - sdhci-omap: Add support for external DMA"

* tag 'mmc-v5.6' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc: (89 commits)
  mmc: core: Default to generic_cmd6_time as timeout in __mmc_switch()
  mmc: block: Use generic_cmd6_time when modifying INAND_CMD38_ARG_EXT_CSD
  mmc: core: Specify timeouts for BKOPS and CACHE_FLUSH for eMMC
  mmc: sdhci-cadence: remove unneeded 'inline' marker
  dt-bindings: mmc: rockchip-dw-mshc: add description for rk3308
  dt-bindings: mmc: convert rockchip dw-mshc bindings to yaml
  dt-bindings: mmc: convert synopsys dw-mshc bindings to yaml
  mmc: sdhci-msm: Add CQHCI support for sdhci-msm
  mmc: sdhci: Let a vendor driver supply and update ADMA descriptor size
  mmc: sdhci-of-esdhc: fix serious issue clock is always disabled
  mmc: sdhci-of-esdhc: fix transfer mode register reading
  mmc: sdhci-brcmstb: Fix incorrect switch to HS mode
  mmc: sdhci-brcmstb: Add support for Command Queuing (CQE)
  mmc: sdhci-brcmstb: Add shutdown callback
  mmc: sdhci-brcmstb: Fix driver to defer on clk_get defer
  mmc: sdhci-brcmstb: Add ability to use HS400ES transfer mode
  dt-bindings: mmc: brcm,sdhci-brcmstb: Add support for 7216b0
  mmc: core: limit probe clock frequency to configured f_max
  mmc: sdhci-milbeaut: Remove redundant platform_get_irq error message
  mmc: sdhci: fix an issue of mixing different types
  ...
</content>
</entry>
<entry>
<title>mfd: syscon: Add arguments support for syscon reference</title>
<updated>2020-01-24T07:33:59Z</updated>
<author>
<name>Orson Zhai</name>
<email>orson.zhai@unisoc.com</email>
</author>
<published>2020-01-21T07:09:38Z</published>
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<id>urn:sha1:6a24f567af4accef6d73b0be407227c537b94a1f</id>
<content type='text'>
There are a lot of similar global registers being used across multiple SoCs
from Unisoc. But most of these registers are assigned with different offset
for different SoCs. It is hard to handle all of them in an all-in-one
kernel image.

Add a helper function to get regmap with arguments where we could put some
extra information such as the offset value.

Signed-off-by: Orson Zhai &lt;orson.zhai@unisoc.com&gt;
Tested-by: Baolin Wang &lt;baolin.wang@unisoc.com&gt;
Reviewed-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Signed-off-by: Lee Jones &lt;lee.jones@linaro.org&gt;
</content>
</entry>
<entry>
<title>mfd: dbx500-prcmu: Drop DSI pll clock functions</title>
<updated>2020-01-24T07:33:58Z</updated>
<author>
<name>Linus Walleij</name>
<email>linus.walleij@linaro.org</email>
</author>
<published>2019-12-28T22:26:15Z</published>
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<id>urn:sha1:2cce09eb11228386260a1b73133aee41f4bb33b1</id>
<content type='text'>
The DSI PLLs are handled by the generic clock framework
since ages, this code is completely unused and misleading.
Delete it.

Cc: Stephan Gerhold &lt;stephan@gerhold.net&gt;
Cc: Ulf Hansson &lt;ulf.hansson@linaro.org&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Signed-off-by: Lee Jones &lt;lee.jones@linaro.org&gt;
</content>
</entry>
<entry>
<title>mfd: dbx500-prcmu: Drop set_display_clocks()</title>
<updated>2020-01-24T07:33:58Z</updated>
<author>
<name>Linus Walleij</name>
<email>linus.walleij@linaro.org</email>
</author>
<published>2019-12-28T22:26:14Z</published>
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<id>urn:sha1:f41810921bdca37161a63f689cdcb36155f0fad6</id>
<content type='text'>
The display clocks are handled by the generic clock framework
since ages, this code is completely unused and misleading.
Delete it.

Cc: Stephan Gerhold &lt;stephan@gerhold.net&gt;
Cc: Ulf Hansson &lt;ulf.hansson@linaro.org&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Signed-off-by: Lee Jones &lt;lee.jones@linaro.org&gt;
</content>
</entry>
<entry>
<title>rtc: bd70528: add BD71828 support</title>
<updated>2020-01-24T07:23:06Z</updated>
<author>
<name>Matti Vaittinen</name>
<email>matti.vaittinen@fi.rohmeurope.com</email>
</author>
<published>2020-01-20T13:45:36Z</published>
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<id>urn:sha1:fe5a591b7814ffbc90aff661aeb8264937002f54</id>
<content type='text'>
ROHM BD71828 PMIC RTC block is from many parts similar to one
on BD70528. Support BD71828 RTC using BD70528 RTC driver and
avoid re-inventing the wheel.

Signed-off-by: Matti Vaittinen &lt;matti.vaittinen@fi.rohmeurope.com&gt;
Acked-by: Alexandre Belloni &lt;alexandre.belloni@bootlin.com&gt;
Signed-off-by: Lee Jones &lt;lee.jones@linaro.org&gt;
</content>
</entry>
<entry>
<title>mfd: bd70528: Fix hour register mask</title>
<updated>2020-01-24T07:23:01Z</updated>
<author>
<name>Matti Vaittinen</name>
<email>matti.vaittinen@fi.rohmeurope.com</email>
</author>
<published>2020-01-20T13:45:11Z</published>
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<id>urn:sha1:6c883472e1c11cb05561b6dd0c28bb037c2bf2de</id>
<content type='text'>
When RTC is used in 24H mode (and it is by this driver) the maximum
hour value is 24 in BCD. This occupies bits [5:0] - which means
correct mask for HOUR register is 0x3f not 0x1f. Fix the mask

Fixes: 32a4a4ebf768 ("rtc: bd70528: Initial support for ROHM bd70528 RTC")

Signed-off-by: Matti Vaittinen &lt;matti.vaittinen@fi.rohmeurope.com&gt;
Acked-by: Alexandre Belloni &lt;alexandre.belloni@bootlin.com&gt;
Signed-off-by: Lee Jones &lt;lee.jones@linaro.org&gt;
</content>
</entry>
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