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<title>user/sven/linux.git/include/linux/mlx4/device.h, branch v3.2.19</title>
<subtitle>Linux Kernel
</subtitle>
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<updated>2011-11-01T17:51:38Z</updated>
<entry>
<title>Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/roland/infiniband</title>
<updated>2011-11-01T17:51:38Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2011-11-01T17:51:38Z</published>
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<id>urn:sha1:f470f8d4e702593ee1d0852871ad80373bce707b</id>
<content type='text'>
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/roland/infiniband: (62 commits)
  mlx4_core: Deprecate log_num_vlan module param
  IB/mlx4: Don't set VLAN in IBoE WQEs' control segment
  IB/mlx4: Enable 4K mtu for IBoE
  RDMA/cxgb4: Mark QP in error before disabling the queue in firmware
  RDMA/cxgb4: Serialize calls to CQ's comp_handler
  RDMA/cxgb3: Serialize calls to CQ's comp_handler
  IB/qib: Fix issue with link states and QSFP cables
  IB/mlx4: Configure extended active speeds
  mlx4_core: Add extended port capabilities support
  IB/qib: Hold links until tuning data is available
  IB/qib: Clean up checkpatch issue
  IB/qib: Remove s_lock around header validation
  IB/qib: Precompute timeout jiffies to optimize latency
  IB/qib: Use RCU for qpn lookup
  IB/qib: Eliminate divide/mod in converting idx to egr buf pointer
  IB/qib: Decode path MTU optimization
  IB/qib: Optimize RC/UC code by IB operation
  IPoIB: Use the right function to do DMA unmap pages
  RDMA/cxgb4: Use correct QID in insert_recv_cqe()
  RDMA/cxgb4: Make sure flush CQ entries are collected on connection close
  ...
</content>
</entry>
<entry>
<title>Merge branches 'amso1100', 'cma', 'cxgb3', 'cxgb4', 'fdr', 'ipath', 'ipoib', 'misc', 'mlx4', 'misc', 'nes', 'qib' and 'xrc' into for-next</title>
<updated>2011-11-01T16:37:08Z</updated>
<author>
<name>Roland Dreier</name>
<email>roland@purestorage.com</email>
</author>
<published>2011-11-01T16:37:08Z</published>
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<id>urn:sha1:504255f8d0480cf293962adf4bc3aecac645ae71</id>
<content type='text'>
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</entry>
<entry>
<title>mlx4_core: Add extended port capabilities support</title>
<updated>2011-10-28T18:33:38Z</updated>
<author>
<name>Marcel Apfelbaum</name>
<email>marcela@dev.mellanox.co.il</email>
</author>
<published>2011-10-24T09:02:34Z</published>
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<id>urn:sha1:97285b78174423e5576b2e06aa45f64df009da5b</id>
<content type='text'>
An Extended Port Info packet is sent to each hw port during HCA init.
If it returns without error, we assume the port supports extended port
capabilities.

Signed-off-by: Marcel Apfelbaum &lt;marcela@dev.mellanox.co.il&gt;
Reviewed-by: Jack Morgenstein &lt;jackm@dev.mellanox.com&gt;
Signed-off-by: Roland Dreier &lt;roland@purestorage.com&gt;
</content>
</entry>
<entry>
<title>mlx4_en: Controlling FCS header removal</title>
<updated>2011-10-19T07:42:26Z</updated>
<author>
<name>Yevgeny Petrilin</name>
<email>yevgenyp@mellanox.co.il</email>
</author>
<published>2011-10-18T01:50:42Z</published>
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<id>urn:sha1:f3a9d1f25dfeadf22c775880633a587cc6778872</id>
<content type='text'>
Canceling FCS removal where FW allows for better alignment
of incoming data.

Signed-off-by: Yevgeny Petrilin &lt;yevgenyp@mellanox.co.il&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>IB/mlx4: Add support for XRC SRQs</title>
<updated>2011-10-13T16:43:46Z</updated>
<author>
<name>Sean Hefty</name>
<email>sean.hefty@intel.com</email>
</author>
<published>2011-06-02T17:43:26Z</published>
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<id>urn:sha1:18abd5ea571608a7c726fc56e21d3e31f9febfd0</id>
<content type='text'>
Allow the user to create XRC SRQs.  This patch is based on a patch
from Jack Morgenstrein &lt;jackm@dev.mellanox.co.il&gt;.

Signed-off-by: Sean Hefty &lt;sean.hefty@intel.com&gt;
Signed-off-by: Roland Dreier &lt;roland@purestorage.com&gt;
</content>
</entry>
<entry>
<title>IB/mlx4: Add support for XRC domains</title>
<updated>2011-10-13T16:43:03Z</updated>
<author>
<name>Sean Hefty</name>
<email>sean.hefty@intel.com</email>
</author>
<published>2011-06-02T16:01:33Z</published>
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<id>urn:sha1:012a8ff577f95211c6ffd3b77a94c34ebae009b6</id>
<content type='text'>
Support creating and destroying XRC domains.  Any sharing of the XRCD
is managed above the low-level driver.

Signed-off-by: Sean Hefty &lt;sean.hefty@intel.com&gt;
Signed-off-by: Roland Dreier &lt;roland@purestorage.com&gt;
</content>
</entry>
<entry>
<title>atomic: use &lt;linux/atomic.h&gt;</title>
<updated>2011-07-26T23:49:47Z</updated>
<author>
<name>Arun Sharma</name>
<email>asharma@fb.com</email>
</author>
<published>2011-07-26T23:09:06Z</published>
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<id>urn:sha1:60063497a95e716c9a689af3be2687d261f115b4</id>
<content type='text'>
This allows us to move duplicated code in &lt;asm/atomic.h&gt;
(atomic_inc_not_zero() for now) to &lt;linux/atomic.h&gt;

Signed-off-by: Arun Sharma &lt;asharma@fb.com&gt;
Reviewed-by: Eric Dumazet &lt;eric.dumazet@gmail.com&gt;
Cc: Ingo Molnar &lt;mingo@elte.hu&gt;
Cc: David Miller &lt;davem@davemloft.net&gt;
Cc: Eric Dumazet &lt;eric.dumazet@gmail.com&gt;
Acked-by: Mike Frysinger &lt;vapier@gentoo.org&gt;
Signed-off-by: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</content>
</entry>
<entry>
<title>mlx4_core: Add network flow counters</title>
<updated>2011-07-19T04:04:34Z</updated>
<author>
<name>Or Gerlitz</name>
<email>ogerlitz@mellanox.com</email>
</author>
<published>2011-06-15T14:47:14Z</published>
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<id>urn:sha1:f2a3f6a32cf64db1495b5ced8625b9a80bde44e5</id>
<content type='text'>
ConnectX devices support a set of flow counters that can be attached
to a set containing one or more QPs.  Each such counter tracks receive
and transmit packets and bytes of these QPs.  This patch queries the
device to check support for counters, handles initialization of the
HCA to enable counters, and initializes a bitmap allocator to control
counter allocations.  Derived from patch by Eli Cohen &lt;eli@mellanox.co.il&gt;.

Signed-off-by: Or Gerlitz &lt;ogerlitz@mellanox.co.il&gt;
Signed-off-by: Roland Dreier &lt;roland@purestorage.com&gt;
</content>
</entry>
<entry>
<title>mlx4_core: Read extended capabilities into the flags field</title>
<updated>2011-07-19T04:04:32Z</updated>
<author>
<name>Or Gerlitz</name>
<email>ogerlitz@mellanox.com</email>
</author>
<published>2011-07-07T19:19:29Z</published>
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<id>urn:sha1:ccf863219675aa86bebdd6a2806acb8176478e37</id>
<content type='text'>
Query another dword containing up to 32 extended device capabilities
and merge it into struct mlx4_caps.flags.  Update the code that
handles the current extended device capabilities (e.g UDP RSS, WoL,
vep steering, etc) to use the extended device cap flags field instead
of a field per extended capability.  Initial patch done by Eli Cohen
&lt;eli@mellanox.co.il&gt;.

Signed-off-by: Or Gerlitz &lt;ogerlitz@mellanox.co.il&gt;
Signed-off-by: Roland Dreier &lt;roland@purestorage.com&gt;
</content>
</entry>
<entry>
<title>mlx4_core: Extend capability flags to 64 bits</title>
<updated>2011-07-19T04:04:32Z</updated>
<author>
<name>Or Gerlitz</name>
<email>ogerlitz@mellanox.com</email>
</author>
<published>2011-06-15T14:41:42Z</published>
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<id>urn:sha1:52eafc68d601afd699b023201b0c6be5209f39ce</id>
<content type='text'>
The latest firmware adds a second dword containing more device flags,
so extend the device capabilities flags field from 32 to 64 bits.
Derived from patch by Eli Cohen &lt;eli@mellanox.co.il&gt;

Signed-off-by: Or Gerlitz &lt;ogerlitz@mellanox.co.il&gt;
Signed-off-by: Roland Dreier &lt;roland@purestorage.com&gt;
</content>
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