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<title>user/sven/linux.git/include/linux/mlx5/eswitch.h, branch v5.8</title>
<subtitle>Linux Kernel
</subtitle>
<id>https://git.stealer.net/cgit.cgi/user/sven/linux.git/atom?h=v5.8</id>
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<updated>2020-03-12T22:00:38Z</updated>
<entry>
<title>net/mlx5: E-Switch, Enable reg c1 loopback when possible</title>
<updated>2020-03-12T22:00:38Z</updated>
<author>
<name>Paul Blakey</name>
<email>paulb@mellanox.com</email>
</author>
<published>2020-03-12T10:23:03Z</published>
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<id>urn:sha1:5b7cb7451585f83d414512a70b79b2086b8c6ed1</id>
<content type='text'>
Enable reg c1 loopback if firmware reports it's supported,
as this is needed for restoring packet metadata (e.g chain).

Also define helper to query if it is enabled.

Signed-off-by: Paul Blakey &lt;paulb@mellanox.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>net/mlx5: E-Switch, Get reg_c0 value on CQE</title>
<updated>2020-02-20T01:49:48Z</updated>
<author>
<name>Paul Blakey</name>
<email>paulb@mellanox.com</email>
</author>
<published>2020-02-16T10:01:27Z</published>
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<id>urn:sha1:11b717d6152699623fb1133759f9b8f235935a51</id>
<content type='text'>
On RX side create a restore table in OFFLOADS namespace.
This table will match on all values for reg_c0 we will use,
and set it to the flow_tag. This flow tag can then be read on the CQE.

As there is no copy action from reg c0 to flow tag, instead we have to
set the flow tag explictily. We add an API so callers can add all the used
reg_c0 values (tags) and for each of those we add a restore rule.

This will be used in a following patch to save the miss chain mapping
tag on reg_c0 and from it restore the tc chain on the skb.

Signed-off-by: Paul Blakey &lt;paulb@mellanox.com&gt;
Reviewed-by: Roi Dayan &lt;roid@mellanox.com&gt;
Reviewed-by: Oz Shlomo &lt;ozsh@mellanox.com&gt;
Reviewed-by: Mark Bloch &lt;markb@mellanox.com&gt;
Signed-off-by: Saeed Mahameed &lt;saeedm@mellanox.com&gt;
</content>
</entry>
<entry>
<title>net/mlx5: E-Switch, Move source port on reg_c0 to the upper 16 bits</title>
<updated>2020-02-20T01:49:48Z</updated>
<author>
<name>Paul Blakey</name>
<email>paulb@mellanox.com</email>
</author>
<published>2020-02-16T10:01:26Z</published>
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<id>urn:sha1:0f0d3827c0b4d6c3d219a73ea103077dc5bc17aa</id>
<content type='text'>
Multi chain support requires the miss path to continue the processing
from the last chain id, and for that we need to save the chain
miss tag (a mapping for 32bit chain id) on reg_c0 which will
come in a next patch.

Currently reg_c0 is exclusively used to store the source port
metadata, giving it 32bit, it is created from 16bits of vcha_id,
and 16bits of vport number.

We will move this source port metadata to upper 16bits, and leave the
lower bits for the chain miss tag. We compress the reg_c0 source port
metadata to 16bits by taking 8 bits from vhca_id, and 8bits from
the vport number.

Since we compress the vport number to 8bits statically, and leave two
top ids for special PF/ECPF numbers, we will only support a max of 254
vports with this strategy.

Signed-off-by: Paul Blakey &lt;paulb@mellanox.com&gt;
Reviewed-by: Oz Shlomo &lt;ozsh@mellanox.com&gt;
Reviewed-by: Mark Bloch &lt;markb@mellanox.com&gt;
Signed-off-by: Saeed Mahameed &lt;saeedm@mellanox.com&gt;
</content>
</entry>
<entry>
<title>Merge branch 'mlx5-next' of git://git.kernel.org/pub/scm/linux/kernel/git/mellanox/linux</title>
<updated>2019-09-02T07:16:05Z</updated>
<author>
<name>Saeed Mahameed</name>
<email>saeedm@mellanox.com</email>
</author>
<published>2019-09-02T06:47:09Z</published>
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<id>urn:sha1:a06ebb8d953b4100236f3057be51d67640e06323</id>
<content type='text'>
Merge mlx5-next patches needed for upcoming mlx5 software steering.

1) Alex adds HW bits and definitions required for SW steering
2) Ariel moves device memory management to mlx5_core (From mlx5_ib)
3) Maor, Cleanups and fixups for eswitch mode and RoCE
4) Mark, Set only stag for match untagged packets

Signed-off-by: Saeed Mahameed &lt;saeedm@mellanox.com&gt;
</content>
</entry>
<entry>
<title>net/mlx5: Add stub for mlx5_eswitch_mode</title>
<updated>2019-09-02T06:44:42Z</updated>
<author>
<name>Maor Gottlieb</name>
<email>maorg@mellanox.com</email>
</author>
<published>2019-08-29T23:42:36Z</published>
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<id>urn:sha1:f813cb506b8c9abc106314e1f95c9f2ebf260988</id>
<content type='text'>
Return MLX5_ESWITCH_NONE when CONFIG_MLX5_ESWITCH
is not selected.

Signed-off-by: Maor Gottlieb &lt;maorg@mellanox.com&gt;
Reviewed-by: Mark Bloch &lt;markb@mellanox.com&gt;
Signed-off-by: Saeed Mahameed &lt;saeedm@mellanox.com&gt;
</content>
</entry>
<entry>
<title>net/mlx5: E-switch, Removed unused hwid</title>
<updated>2019-08-09T21:54:10Z</updated>
<author>
<name>Parav Pandit</name>
<email>parav@mellanox.com</email>
</author>
<published>2019-07-26T13:26:52Z</published>
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<id>urn:sha1:ef2e4094e076858343ea1202046443f642a245cd</id>
<content type='text'>
Currently mlx5_eswitch_rep stores same hw ID for all representors.
However it is never used from this structure.
It is always used from mlx5_vport.

Hence, remove unused field.

Signed-off-by: Parav Pandit &lt;parav@mellanox.com&gt;
Reviewed-by: Vu Pham &lt;vuhuong@mellanox.com&gt;
Signed-off-by: Saeed Mahameed &lt;saeedm@mellanox.com&gt;
</content>
</entry>
<entry>
<title>Merge branch 'mlx5-next' of git://git.kernel.org/pub/scm/linux/kernel/git/mellanox/linux</title>
<updated>2019-07-04T20:42:59Z</updated>
<author>
<name>Saeed Mahameed</name>
<email>saeedm@mellanox.com</email>
</author>
<published>2019-07-04T20:40:32Z</published>
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<id>urn:sha1:e08a976a16cafc20931db1d17aed9183202bfa8d</id>
<content type='text'>
Misc updates from mlx5-next branch:

1) Add the required HW definitions and structures for upcoming TLS
   support.
2) Add support for MCQI and MCQS hardware registers for fw version query.
3) Added hardware bits and structures definitions for sub-functions
4) Small code cleanup and improvement for PF pci driver.
5) Bluefield (ECPF) updates and refactoring for better E-Switch
   management on ECPF embedded CPU NIC:
   5.1) Consolidate querying eswitch number of VFs
   5.2) Register event handler at the correct E-Switch init stage
   5.3) Setup PF's inline mode and vlan pop when the ECPF is the
        E-Swtich manager ( the host PF is basically a VF ).
   5.4) Handle Vport UC address changes in switchdev mode.

6) Cleanup the rep and netdev reference when unloading IB rep.

Signed-off-by: Saeed Mahameed &lt;saeedm@mellanox.com&gt;

i# All conflicts fixed but you are still merging.
</content>
</entry>
<entry>
<title>net/mlx5: Introduce and use mlx5_eswitch_get_total_vports()</title>
<updated>2019-07-03T19:50:42Z</updated>
<author>
<name>Parav Pandit</name>
<email>parav@mellanox.com</email>
</author>
<published>2019-05-15T05:04:27Z</published>
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<id>urn:sha1:2752b823169b216db142c4466b43269281962dcf</id>
<content type='text'>
Instead MLX5_TOTAL_VPORTS, use mlx5_eswitch_get_total_vports().
mlx5_eswitch_get_total_vports() in subsequent patch accounts for SF
vports as well.
Expanding MLX5_TOTAL_VPORTS macro would require exposing SF internals to
more generic vport.h header file. Such exposure is not desired.
Hence a mlx5_eswitch_get_total_vports() is introduced.

Given that mlx5_eswitch_get_total_vports() API wants to work on const
mlx5_core_dev*, change its helper functions also to accept const *dev.

Signed-off-by: Parav Pandit &lt;parav@mellanox.com&gt;
Signed-off-by: Saeed Mahameed &lt;saeedm@mellanox.com&gt;
</content>
</entry>
<entry>
<title>net/mlx5: E-Switch, Refactor eswitch SR-IOV interface</title>
<updated>2019-07-01T23:40:30Z</updated>
<author>
<name>Bodong Wang</name>
<email>bodong@mellanox.com</email>
</author>
<published>2019-06-28T22:36:15Z</published>
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<id>urn:sha1:f6455de0b0e52dcb11aeb503151b12ec87f9c5e4</id>
<content type='text'>
Devlink eswitch mode is not necessarily related to SR-IOV, e.g, ECPF
can be at offload mode when SR-IOV is not enabled.

Rename the interface and eswitch mode names to decouple from SR-IOV,
and cleanup eswitch messages accordingly.

Signed-off-by: Bodong Wang &lt;bodong@mellanox.com&gt;
Signed-off-by: Saeed Mahameed &lt;saeedm@mellanox.com&gt;
</content>
</entry>
<entry>
<title>{IB, net}/mlx5: E-Switch, Use index of rep for vport to IB port mapping</title>
<updated>2019-07-01T23:40:30Z</updated>
<author>
<name>Bodong Wang</name>
<email>bodong@mellanox.com</email>
</author>
<published>2019-06-28T22:35:53Z</published>
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<id>urn:sha1:2f69e591e4531d3192841a4eb2bd9b512f5a8b66</id>
<content type='text'>
In the single IB device mode, the mapping between vport number and
rep relies on a counter. However for dynamic vport allocation, it is
desired to keep consistent map of eswitch vport and IB port.

Hence, simplify code to remove the free running counter and instead
use the available vport index during load/unload sequence from the
eswitch.

Signed-off-by: Bodong Wang &lt;bodong@mellanox.com&gt;
Suggested-by: Parav Pandit &lt;parav@mellanox.com&gt;
Reviewed-by: Parav Pandit &lt;parav@mellanox.com&gt;
Reviewed-by: Mark Bloch &lt;markb@mellanox.com&gt;
Signed-off-by: Saeed Mahameed &lt;saeedm@mellanox.com&gt;
</content>
</entry>
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