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<title>user/sven/linux.git/include/linux/mlx5, branch v3.16.46</title>
<subtitle>Linux Kernel
</subtitle>
<id>https://git.stealer.net/cgit.cgi/user/sven/linux.git/atom?h=v3.16.46</id>
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<updated>2016-11-20T01:16:41Z</updated>
<entry>
<title>IB/mlx5: Fix MODIFY_QP command input structure</title>
<updated>2016-11-20T01:16:41Z</updated>
<author>
<name>Artemy Kovalyov</name>
<email>artemyko@mellanox.com</email>
</author>
<published>2016-06-17T12:33:31Z</published>
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<id>urn:sha1:f09726af61f6655111c9905726ce594f94e407c2</id>
<content type='text'>
commit e3353c268b06236d6c40fa1714c114f21f44451c upstream.

Make MODIFY_QP command input structure compliant to specification

Fixes: e126ba97dba9 ('mlx5: Add driver for Mellanox Connect-IB adapters')
Signed-off-by: Artemy Kovalyov &lt;artemyko@mellanox.com&gt;
Signed-off-by: Leon Romanovsky &lt;leon@kernel.org&gt;
Signed-off-by: Doug Ledford &lt;dledford@redhat.com&gt;
Signed-off-by: Ben Hutchings &lt;ben@decadent.org.uk&gt;
</content>
</entry>
<entry>
<title>net/mlx5: Add timeout handle to commands with callback</title>
<updated>2016-08-22T21:38:25Z</updated>
<author>
<name>Mohamad Haj Yahia</name>
<email>mohamad@mellanox.com</email>
</author>
<published>2016-06-30T14:34:43Z</published>
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<id>urn:sha1:a2666756c560e1a2b97c43345b23fbda55e62b85</id>
<content type='text'>
commit 65ee67084589c1783a74b4a4a5db38d7264ec8b5 upstream.

The current implementation does not handle timeout in case of command
with callback request, and this can lead to deadlock if the command
doesn't get fw response.
Add delayed callback timeout work before posting the command to fw.
In case of real fw command completion we will cancel the delayed work.
In case of fw command timeout the callback timeout handler will be
called and it will simulate fw completion with timeout error.

Fixes: e126ba97dba9 ('mlx5: Add driver for Mellanox Connect-IB adapters')
Signed-off-by: Mohamad Haj Yahia &lt;mohamad@mellanox.com&gt;
Signed-off-by: Saeed Mahameed &lt;saeedm@mellanox.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
Signed-off-by: Ben Hutchings &lt;ben@decadent.org.uk&gt;
</content>
</entry>
<entry>
<title>IB/mlx5: Fix post send fence logic</title>
<updated>2016-08-22T21:38:18Z</updated>
<author>
<name>Eli Cohen</name>
<email>eli@mellanox.com</email>
</author>
<published>2016-06-22T14:27:26Z</published>
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<id>urn:sha1:972fb25e0b214289f85acf46675eefda2e574cf4</id>
<content type='text'>
commit c9b254955b9f8814966f5dabd34c39d0e0a2b437 upstream.

If the caller specified IB_SEND_FENCE in the send flags of the work
request and no previous work request stated that the successive one
should be fenced, the work request would be executed without a fence.
This could result in RDMA read or atomic operations failure due to a MR
being invalidated. Fix this by adding the mlx5 enumeration for fencing
RDMA/atomic operations and fix the logic to apply this.

Fixes: e126ba97dba9 ('mlx5: Add driver for Mellanox Connect-IB adapters')
Signed-off-by: Eli Cohen &lt;eli@mellanox.com&gt;
Signed-off-by: Leon Romanovsky &lt;leon@kernel.org&gt;
Signed-off-by: Doug Ledford &lt;dledford@redhat.com&gt;
Signed-off-by: Ben Hutchings &lt;ben@decadent.org.uk&gt;
</content>
</entry>
<entry>
<title>net/mlx5: Fix the size of modify QP mailbox</title>
<updated>2016-08-22T21:38:10Z</updated>
<author>
<name>Majd Dibbiny</name>
<email>majd@mellanox.com</email>
</author>
<published>2016-06-09T21:07:28Z</published>
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<id>urn:sha1:74e4b89b661fc6cc10f81cf127eb4de9631ee6d0</id>
<content type='text'>
commit 418f8399a8bedf376ec13eb01088f04a76ebdd6f upstream.

Add 16 reserved bytes at the end of mlx5_modify_qp_mbox_in to
match the hardware spec definition.

Fixes: e126ba97dba9 ('mlx5: Add driver for Mellanox Connect-IB adapters')
Signed-off-by: Majd Dibbiny &lt;majd@mellanox.com&gt;
Signed-off-by: Saeed Mahameed &lt;saeedm@mellanox.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
Signed-off-by: Ben Hutchings &lt;ben@decadent.org.uk&gt;
</content>
</entry>
<entry>
<title>net/mlx5: Make command timeout way shorter</title>
<updated>2016-04-30T22:05:52Z</updated>
<author>
<name>Or Gerlitz</name>
<email>ogerlitz@mellanox.com</email>
</author>
<published>2016-03-01T22:13:39Z</published>
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<id>urn:sha1:3320b6abd1b23f1f02bc7ae4599b4bcac10eeb8d</id>
<content type='text'>
commit 6b6c07bdcdc97ccac2596063bfc32a5faddfe884 upstream.

The command timeout is terribly long, whole two hours. Make it 60s so if
things do go wrong, the user gets feedback in relatively short time, so
they can take corrective actions and/or investigate using tools and such.

Fixes: e126ba97dba9 ('mlx5: Add driver for Mellanox Connect-IB adapters')
Signed-off-by: Or Gerlitz &lt;ogerlitz@mellanox.com&gt;
Signed-off-by: Leon Romanovsky &lt;leonro@mellanox.com&gt;
Signed-off-by: Saeed Mahameed &lt;saeedm@mellanox.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
Signed-off-by: Ben Hutchings &lt;ben@decadent.org.uk&gt;
</content>
</entry>
<entry>
<title>mlx5_core: Store MR attributes in mlx5_mr_core during creation and after UMR</title>
<updated>2014-05-27T18:53:06Z</updated>
<author>
<name>Haggai Eran</name>
<email>haggaie@mellanox.com</email>
</author>
<published>2014-05-22T11:50:10Z</published>
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<id>urn:sha1:b475598aec63f2efbc78f0ff1895d917d2370846</id>
<content type='text'>
The patch stores iova, pd and size during mr creation and after UMRs
that modify them.  It removes the unused access flags field.

Signed-off-by: Haggai Eran &lt;haggaie@mellanox.com&gt;
Signed-off-by: Roland Dreier &lt;roland@purestorage.com&gt;
</content>
</entry>
<entry>
<title>IB/mlx5: Add block multicast loopback support</title>
<updated>2014-04-11T01:43:32Z</updated>
<author>
<name>Eli Cohen</name>
<email>eli@dev.mellanox.co.il</email>
</author>
<published>2014-04-01T21:10:16Z</published>
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<id>urn:sha1:f360d88a2efddf2d2a2d01a8ac76fded34d624b4</id>
<content type='text'>
Add support for the block multicast loopback QP creation flag along
the proper firmware API for that.

Signed-off-by: Eli Cohen &lt;eli@mellanox.com&gt;
Signed-off-by: Or Gerlitz &lt;ogerlitz@mellanox.com&gt;
Signed-off-by: Roland Dreier &lt;roland@purestorage.com&gt;
</content>
</entry>
<entry>
<title>IB/mlx5: Collect signature error completion</title>
<updated>2014-03-07T19:40:04Z</updated>
<author>
<name>Sagi Grimberg</name>
<email>sagig@mellanox.com</email>
</author>
<published>2014-02-23T12:19:12Z</published>
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<id>urn:sha1:d5436ba01075ef4629015f7a00914d64ffd795d6</id>
<content type='text'>
This commit takes care of the generated signature error CQE generated
by the HW (if happened).  The underlying mlx5 driver will handle
signature error completions and will mark the relevant memory region
as dirty.

Once the consumer gets the completion for the transaction, it must
check for signature errors on signature memory region using a new
lightweight verb ib_check_mr_status().

In case the user doesn't check for signature error (i.e. doesn't call
ib_check_mr_status() with status check IB_MR_CHECK_SIG_STATUS), the
memory region cannot be used for another signature operation
(REG_SIG_MR work request will fail).

Signed-off-by: Sagi Grimberg &lt;sagig@mellanox.com&gt;
Signed-off-by: Roland Dreier &lt;roland@purestorage.com&gt;
</content>
</entry>
<entry>
<title>IB/mlx5: Support IB_WR_REG_SIG_MR</title>
<updated>2014-03-07T19:39:51Z</updated>
<author>
<name>Sagi Grimberg</name>
<email>sagig@mellanox.com</email>
</author>
<published>2014-02-23T12:19:11Z</published>
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<id>urn:sha1:e6631814fb3ac454fbbf47ea343c2b9508e4e1ba</id>
<content type='text'>
This patch implements IB_WR_REG_SIG_MR posted by the user.

Baisically this WR involves 3 WQEs in order to prepare and properly
register the signature layout:

1. post UMR WR to register the sig_mr in one of two possible ways:
    * In case the user registered a single MR for data so the UMR data segment
      consists of:
      - single klm (data MR) passed by the user
      - BSF with signature attributes requested by the user.
    * In case the user registered 2 MRs, one for data and one for protection,
      the UMR consists of:
      - strided block format which includes data and protection MRs and
        their repetitive block format.
      - BSF with signature attributes requested by the user.

2. post SET_PSV in order to set the memory domain initial
   signature parameters passed by the user.
   SET_PSV is not signaled and solicited CQE.

3. post SET_PSV in order to set the wire domain initial
   signature parameters passed by the user.
   SET_PSV is not signaled and solicited CQE.

* After this compound WR we place a small fence for next WR to come.

This patch also introduces some helper functions to set the BSF correctly
and determining the signature format selectors.

Signed-off-by: Sagi Grimberg &lt;sagig@mellanox.com&gt;
Signed-off-by: Roland Dreier &lt;roland@purestorage.com&gt;
</content>
</entry>
<entry>
<title>IB/mlx5: Keep mlx5 MRs in a radix tree under device</title>
<updated>2014-03-07T19:26:49Z</updated>
<author>
<name>Sagi Grimberg</name>
<email>sagig@mellanox.com</email>
</author>
<published>2014-02-23T12:19:10Z</published>
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<id>urn:sha1:3bcdb17a5e88288ead90be3c107e754a6075a5b0</id>
<content type='text'>
This will be useful when processing signature errors on a specific
key.  The mlx5 driver will lookup the matching mlx5 memory region
structure and mark it as dirty (contains signature errors).

Signed-off-by: Sagi Grimberg &lt;sagig@mellanox.com&gt;
Signed-off-by: Roland Dreier &lt;roland@purestorage.com&gt;
</content>
</entry>
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