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<title>user/sven/linux.git/include/linux/mlx5, branch v4.19.124</title>
<subtitle>Linux Kernel
</subtitle>
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<updated>2020-04-17T08:48:43Z</updated>
<entry>
<title>IB/mlx5: Replace tunnel mpls capability bits for tunnel_offloads</title>
<updated>2020-04-17T08:48:43Z</updated>
<author>
<name>Alex Vesker</name>
<email>valex@mellanox.com</email>
</author>
<published>2020-03-05T12:38:41Z</published>
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<id>urn:sha1:dce1622d540119b9643c19ccb8b3953c37107582</id>
<content type='text'>
[ Upstream commit 41e684ef3f37ce6e5eac3fb5b9c7c1853f4b0447 ]

Until now the flex parser capability was used in ib_query_device() to
indicate tunnel_offloads_caps support for mpls_over_gre/mpls_over_udp.

Newer devices and firmware will have configurations with the flexparser
but without mpls support.

Testing for the flex parser capability was a mistake, the tunnel_stateless
capability was intended for detecting mpls and was introduced at the same
time as the flex parser capability.

Otherwise userspace will be incorrectly informed that a future device
supports MPLS when it does not.

Link: https://lore.kernel.org/r/20200305123841.196086-1-leon@kernel.org
Cc: &lt;stable@vger.kernel.org&gt; # 4.17
Fixes: e818e255a58d ("IB/mlx5: Expose MPLS related tunneling offloads")
Signed-off-by: Alex Vesker &lt;valex@mellanox.com&gt;
Reviewed-by: Ariel Levkovich &lt;lariel@mellanox.com&gt;
Signed-off-by: Leon Romanovsky &lt;leonro@mellanox.com&gt;
Signed-off-by: Jason Gunthorpe &lt;jgg@mellanox.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>net/mlx5: Fix mlx5_ifc_query_lag_out_bits</title>
<updated>2020-01-27T13:51:03Z</updated>
<author>
<name>Mark Zhang</name>
<email>markz@mellanox.com</email>
</author>
<published>2019-07-31T11:40:13Z</published>
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<id>urn:sha1:153797c47a5722373d07101f31f3f55f04e79c83</id>
<content type='text'>
[ Upstream commit ea77388b02270b0af8dc57f668f311235ea068f0 ]

Remove the "reserved_at_40" field to match the device specification.

Fixes: 84df61ebc69b ("net/mlx5: Add HW interfaces used by LAG")
Signed-off-by: Mark Zhang &lt;markz@mellanox.com&gt;
Reviewed-by: Yishai Hadas &lt;yishaih@mellanox.com&gt;
Signed-off-by: Leon Romanovsky &lt;leonro@mellanox.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>net/mlx5: Fix atomic_mode enum values</title>
<updated>2019-11-20T17:45:52Z</updated>
<author>
<name>Moni Shoua</name>
<email>monis@mellanox.com</email>
</author>
<published>2018-09-03T17:19:28Z</published>
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<id>urn:sha1:5dc1cbcff700b11bea1b5707d6ee0f95c2850e5c</id>
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[ Upstream commit aa7e80b220f3a543eefbe4b7e2c5d2b73e2e2ef7 ]

The field atomic_mode is 4 bits wide and therefore can hold values
from 0x0 to 0xf. Remove the unnecessary 20 bit shift that made the values
be incorrect. While that, remove unused enum values.

Fixes: 57cda166bbe0 ("net/mlx5: Add DCT command interface")
Signed-off-by: Moni Shoua &lt;monis@mellanox.com&gt;
Reviewed-by: Artemy Kovalyov &lt;artemyko@mellanox.com&gt;
Signed-off-by: Leon Romanovsky &lt;leonro@mellanox.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>net/mlx5e: Prevent encap flow counter update async to user query</title>
<updated>2019-08-09T15:52:33Z</updated>
<author>
<name>Ariel Levkovich</name>
<email>lariel@mellanox.com</email>
</author>
<published>2019-07-06T15:06:15Z</published>
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<id>urn:sha1:0ccf47265e4cb7fd13d339ee20a84bdbdbd466ef</id>
<content type='text'>
[ Upstream commit 90bb769291161cf25a818d69cf608c181654473e ]

This patch prevents a race between user invoked cached counters
query and a neighbor last usage updater.

The cached flow counter stats can be queried by calling
"mlx5_fc_query_cached" which provides the number of bytes and
packets that passed via this flow since the last time this counter
was queried.
It does so by reducting the last saved stats from the current, cached
stats and then updating the last saved stats with the cached stats.
It also provide the lastuse value for that flow.

Since "mlx5e_tc_update_neigh_used_value" needs to retrieve the
last usage time of encapsulation flows, it calls the flow counter
query method periodically and async to user queries of the flow counter
using cls_flower.
This call is causing the driver to update the last reported bytes and
packets from the cache and therefore, future user queries of the flow
stats will return lower than expected number for bytes and packets
since the last saved stats in the driver was updated async to the last
saved stats in cls_flower.

This causes wrong stats presentation of encapsulation flows to user.

Since the neighbor usage updater only needs the lastuse stats from the
cached counter, the fix is to use a dedicated lastuse query call that
returns the lastuse value without synching between the cached stats and
the last saved stats.

Fixes: f6dfb4c3f216 ("net/mlx5e: Update neighbour 'used' state using HW flow rules counters")
Signed-off-by: Ariel Levkovich &lt;lariel@mellanox.com&gt;
Reviewed-by: Roi Dayan &lt;roid@mellanox.com&gt;
Signed-off-by: Saeed Mahameed &lt;saeedm@mellanox.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>net/mlx5: Fix modify_cq_in alignment</title>
<updated>2019-08-09T15:52:33Z</updated>
<author>
<name>Edward Srouji</name>
<email>edwards@mellanox.com</email>
</author>
<published>2019-07-23T07:12:55Z</published>
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<id>urn:sha1:cd84a10792f08d3d0cc1cbeed07634e454fe9abd</id>
<content type='text'>
[ Upstream commit 7a32f2962c56d9d8a836b4469855caeee8766bd4 ]

Fix modify_cq_in alignment to match the device specification.
After this fix the 'cq_umem_valid' field will be in the right offset.

Cc: &lt;stable@vger.kernel.org&gt; # 4.19
Fixes: bd37197554eb ("net/mlx5: Update mlx5_ifc with DEVX UID bits")
Signed-off-by: Edward Srouji &lt;edwards@mellanox.com&gt;
Reviewed-by: Yishai Hadas &lt;yishaih@mellanox.com&gt;
Signed-off-by: Leon Romanovsky &lt;leonro@mellanox.com&gt;
Signed-off-by: Saeed Mahameed &lt;saeedm@mellanox.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>net/mlx5e: Add a lock on tir list</title>
<updated>2019-04-17T06:38:42Z</updated>
<author>
<name>Yuval Avnery</name>
<email>yuvalav@mellanox.com</email>
</author>
<published>2019-03-11T04:18:24Z</published>
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<id>urn:sha1:c297e881457882b2121d2c539fd7e75a0977f8cd</id>
<content type='text'>
[ Upstream commit 80a2a9026b24c6bd34b8d58256973e22270bedec ]

Refresh tirs is looping over a global list of tirs while netdevs are
adding and removing tirs from that list. That is why a lock is
required.

Fixes: 724b2aa15126 ("net/mlx5e: TIRs management refactoring")
Signed-off-by: Yuval Avnery &lt;yuvalav@mellanox.com&gt;
Signed-off-by: Saeed Mahameed &lt;saeedm@mellanox.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>net/mlx5: EQ, Use the right place to store/read IRQ affinity hint</title>
<updated>2019-02-12T18:47:01Z</updated>
<author>
<name>Saeed Mahameed</name>
<email>saeedm@mellanox.com</email>
</author>
<published>2018-11-19T18:52:31Z</published>
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<id>urn:sha1:1b63e37679cb38e2e69e09e722c57ac80d42051c</id>
<content type='text'>
[ Upstream commit 1e86ace4c140fd5a693e266c9b23409358f25381 ]

Currently the cpu affinity hint mask for completion EQs is stored and
read from the wrong place, since reading and storing is done from the
same index, there is no actual issue with that, but internal irq_info
for completion EQs stars at MLX5_EQ_VEC_COMP_BASE offset in irq_info
array, this patch changes the code to use the correct offset to store
and read the IRQ affinity hint.

Signed-off-by: Saeed Mahameed &lt;saeedm@mellanox.com&gt;
Reviewed-by: Leon Romanovsky &lt;leonro@mellanox.com&gt;
Reviewed-by: Tariq Toukan &lt;tariqt@mellanox.com&gt;
Signed-off-by: Leon Romanovsky &lt;leonro@mellanox.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>net/mlx5: WQ, fixes for fragmented WQ buffers API</title>
<updated>2018-10-11T01:26:16Z</updated>
<author>
<name>Tariq Toukan</name>
<email>tariqt@mellanox.com</email>
</author>
<published>2018-08-21T11:41:41Z</published>
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<id>urn:sha1:37fdffb217a45609edccbb8b407d031143f551c0</id>
<content type='text'>
mlx5e netdevice used to calculate fragment edges by a call to
mlx5_wq_cyc_get_frag_size(). This calculation did not give the correct
indication for queues smaller than a PAGE_SIZE, (broken by default on
PowerPC, where PAGE_SIZE == 64KB).  Here it is replaced by the correct new
calls/API.

Since (TX/RX) Work Queues buffers are fragmented, here we introduce
changes to the API in core driver, so that it gets a stride index and
returns the index of last stride on same fragment, and an additional
wrapping function that returns the number of physically contiguous
strides that can be written contiguously to the work queue.

This obsoletes the following API functions, and their buggy
usage in EN driver:
* mlx5_wq_cyc_get_frag_size()
* mlx5_wq_cyc_ctr2fragix()

The new API improves modularity and hides the details of such
calculation for mlx5e netdevice and mlx5_ib rdma drivers.

New calculation is also more efficient, and improves performance
as follows:

Packet rate test: pktgen, UDP / IPv4, 64byte, single ring, 8K ring size.

Before: 16,477,619 pps
After:  17,085,793 pps

3.7% improvement

Fixes: 3a2f70331226 ("net/mlx5: Use order-0 allocations for all WQ types")
Signed-off-by: Tariq Toukan &lt;tariqt@mellanox.com&gt;
Reviewed-by: Eran Ben Elisha &lt;eranbe@mellanox.com&gt;
Signed-off-by: Saeed Mahameed &lt;saeedm@mellanox.com&gt;
</content>
</entry>
<entry>
<title>net/mlx5e: Avoid unbounded peer devices when unpairing TC hairpin rules</title>
<updated>2018-10-01T17:58:00Z</updated>
<author>
<name>Alaa Hleihel</name>
<email>alaa@mellanox.com</email>
</author>
<published>2018-09-05T08:43:23Z</published>
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<id>urn:sha1:4d8fcf216c90bc25e34ae2200aa8985ee3158898</id>
<content type='text'>
If the peer device was already unbound, then do not attempt to modify
it's resources, otherwise we will crash on dereferencing non-existing
device.

Fixes: 5c65c564c962 ("net/mlx5e: Support offloading TC NIC hairpin flows")
Signed-off-by: Alaa Hleihel &lt;alaa@mellanox.com&gt;
Reviewed-by: Or Gerlitz &lt;ogerlitz@mellanox.com&gt;
Signed-off-by: Saeed Mahameed &lt;saeedm@mellanox.com&gt;
</content>
</entry>
<entry>
<title>net/mlx5: Use u16 for Work Queue buffer strides offset</title>
<updated>2018-09-06T00:08:33Z</updated>
<author>
<name>Tariq Toukan</name>
<email>tariqt@mellanox.com</email>
</author>
<published>2018-08-21T13:07:58Z</published>
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<id>urn:sha1:a09036221092989b88c55d24d1f12ceb1d7d361f</id>
<content type='text'>
Minimal stride size is 16.
Hence, the number of strides in a fragment (of PAGE_SIZE)
is &lt;= PAGE_SIZE / 16 &lt;= 4K.

u16 is sufficient to represent this.

Fixes: d7037ad73daa ("net/mlx5: Fix QP fragmented buffer allocation")
Signed-off-by: Tariq Toukan &lt;tariqt@mellanox.com&gt;
Reviewed-by: Eran Ben Elisha &lt;eranbe@mellanox.com&gt;
Signed-off-by: Saeed Mahameed &lt;saeedm@mellanox.com&gt;
</content>
</entry>
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