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<title>user/sven/linux.git/include/linux/mmc/mmc.h, branch v5.3.14</title>
<subtitle>Linux Kernel
</subtitle>
<id>https://git.stealer.net/cgit.cgi/user/sven/linux.git/atom?h=v5.3.14</id>
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<updated>2018-07-16T09:21:45Z</updated>
<entry>
<title>mmc: core: Adjust and reuse the macro of R1_STATUS(x)</title>
<updated>2018-07-16T09:21:45Z</updated>
<author>
<name>Shawn Lin</name>
<email>shawn.lin@rock-chips.com</email>
</author>
<published>2018-05-30T02:11:43Z</published>
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<id>urn:sha1:a94a7483a91cb6a0d15a4413e8fc853f33a4e1b9</id>
<content type='text'>
R1_STATUS(x) now is only used by ioctl_rpmb_card_status_poll(),
which checks all bits as possible. But according to the spec,
bit 17 and bit 18 should be ignored, as well bit 14 which is
reserved(must be set to 0) quoting from the spec and these rule
apply to all places checking the device status. So change
its checking from 0xFFFFE000 to 0xFFF9A000.

As a bonus, we reuse it for mmc_do_erase() as well as
mmc_switch_status_error().
(1) Currently mmc_switch_status_error() doesn't check bit 25, but
it means device is locked but not unlocked by CMD42 prior to any
operations which need check busy, which is also not allowed.
(2) mmc_do_erase() also forgot to to check bit 15, WP_ERASE_SKIP.
The spec says "Only partial address space was erased due to existing
write protected blocks.", which obviously means we should fail this I/O.
Otherwise, the partial erased data stored in nonvalatile flash violates
the data integrity from the view of I/O owner, which probably confuse
it when further used.

So reusing R1_STATUS for them not only improve the readability but also
slove real problems.

Signed-off-by: Shawn Lin &lt;shawn.lin@rock-chips.com&gt;
Signed-off-by: Ulf Hansson &lt;ulf.hansson@linaro.org&gt;
</content>
</entry>
<entry>
<title>mmc: Adding AUTO_BKOPS_EN bit set for Auto BKOPS support</title>
<updated>2017-02-14T08:11:00Z</updated>
<author>
<name>Uri Yanai</name>
<email>uri.yanai@sandisk.com</email>
</author>
<published>2017-02-07T16:00:01Z</published>
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<id>urn:sha1:efff8e7879b8b7f8a077f495262f0bb9cfaa0b06</id>
<content type='text'>
Adding dedicated flag for AUTO_BKOPS in card-&gt;ext_csd structure.
Read AUTO_BKOPS bit value from the device EXT_CSD and set to the
card-&gt;ext_csd structure.
In mmc_decode_ext_csd() add a print message in case the AUTO_BKOPS
is enabled

Signed-off-by: Uri Yanai &lt;uri.yanai@sandisk.com&gt;
Signed-off-by: Alex Lemberg &lt;alex.lemberg@sandisk.com&gt;
Signed-off-by: Ulf Hansson &lt;ulf.hansson@linaro.org&gt;
</content>
</entry>
<entry>
<title>mmc: core: Remove unused struct _mmc_csd from public mmc.h header</title>
<updated>2017-02-13T12:20:22Z</updated>
<author>
<name>Ulf Hansson</name>
<email>ulf.hansson@linaro.org</email>
</author>
<published>2017-01-13T13:14:11Z</published>
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<id>urn:sha1:009b0fcea5dfe77663f7ec3927c7c50a97a7675c</id>
<content type='text'>
The struct _mmc_csd isn't being used and has been lurking around for a
while. Let's kill it.

Signed-off-by: Ulf Hansson &lt;ulf.hansson@linaro.org&gt;
Reviewed-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Reviewed-by: Shawn Lin &lt;shawn.lin@rock-chips.com&gt;
</content>
</entry>
<entry>
<title>mmc: core: Move erase/trim/discard defines from public core.h to mmc.h</title>
<updated>2017-02-13T12:20:22Z</updated>
<author>
<name>Ulf Hansson</name>
<email>ulf.hansson@linaro.org</email>
</author>
<published>2017-01-13T13:14:10Z</published>
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<id>urn:sha1:c0a3e080f9294117a7d510a4f01a0b7c6dbcadae</id>
<content type='text'>
As the public mmc.h header already contains similar defines for other mmc
commands and arguments, let's move those for erase/trim/discard into here
as well.

Signed-off-by: Ulf Hansson &lt;ulf.hansson@linaro.org&gt;
Reviewed-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Reviewed-by: Shawn Lin &lt;shawn.lin@rock-chips.com&gt;
</content>
</entry>
<entry>
<title>mmc: core: First step in cleaning up public mmc header files</title>
<updated>2017-02-13T12:20:19Z</updated>
<author>
<name>Ulf Hansson</name>
<email>ulf.hansson@linaro.org</email>
</author>
<published>2017-01-13T13:14:06Z</published>
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<id>urn:sha1:8da007348bf52a91e5137d27d7dcd528edbb80ce</id>
<content type='text'>
This is the first step in cleaning up the public mmc header files. In this
change we makes sure each header file builds standalone, as that helps to
resolve dependencies.

While changing this, it also seems reasonable to stop including other
headers from inside a header itself which it don't depend upon.
Additionally, in some cases such dependencies are better resolved by
forward declaring the needed struct.

Signed-off-by: Ulf Hansson &lt;ulf.hansson@linaro.org&gt;
Reviewed-by: Shawn Lin &lt;shawn.lin@rock-chips.com&gt;
</content>
</entry>
<entry>
<title>mmc: core: Export device lifetime information through sysfs</title>
<updated>2017-02-13T12:19:52Z</updated>
<author>
<name>Jungseung Lee</name>
<email>js07.lee@samsung.com</email>
</author>
<published>2016-12-22T03:37:34Z</published>
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<id>urn:sha1:46bc5c408e4e325efbfff26609c76099979180a7</id>
<content type='text'>
In the eMMC 5.0 version of the spec, several EXT_CSD fields about
device lifetime are added.

 - Two types of estimated indications reflected by averaged wear out of memory
 - An indication reflected by average reserved blocks

Export the information through sysfs.

Signed-off-by: Jungseung Lee &lt;js07.lee@samsung.com&gt;
Reviewed-by: Jaehoon Chung &lt;jh80.chung@samsung.com&gt;
Reviewed-by: Shawn Lin &lt;shawn.lin@rock-chips.com&gt;
Signed-off-by: Ulf Hansson &lt;ulf.hansson@linaro.org&gt;
</content>
</entry>
<entry>
<title>mmc: mmc: Add Command Queue definitions</title>
<updated>2016-12-05T09:31:07Z</updated>
<author>
<name>Adrian Hunter</name>
<email>adrian.hunter@intel.com</email>
</author>
<published>2016-11-29T10:09:16Z</published>
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<id>urn:sha1:925ff3a7a334b3fe968ae15f07d22df21addad26</id>
<content type='text'>
Add definitions relating to Command Queuing.

Signed-off-by: Adrian Hunter &lt;adrian.hunter@intel.com&gt;
Reviewed-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Signed-off-by: Ulf Hansson &lt;ulf.hansson@linaro.org&gt;
</content>
</entry>
<entry>
<title>mmc: core: implement enhanced strobe support</title>
<updated>2016-07-25T08:34:05Z</updated>
<author>
<name>Shawn Lin</name>
<email>shawn.lin@rock-chips.com</email>
</author>
<published>2016-05-26T01:56:22Z</published>
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<id>urn:sha1:81ac2af65793ecfbd79875d45043ff4adc0982b8</id>
<content type='text'>
Controllers use data strobe line to latch data from devices
under hs400 mode, but not for cmd line. So since emmc 5.1, JEDEC
introduces enhanced strobe mode for latching cmd response from
emmc devices to host controllers. This new feature is optional,
so it depends both on device's cap and host's cap to decide
whether to use it or not.

Signed-off-by: Shawn Lin &lt;shawn.lin@rock-chips.com&gt;

Reviewed-by: Jaehoon Chung &lt;jh80.chung@samsung.com&gt;
Tested-by: Douglas Anderson &lt;dianders@chromium.org&gt;
Tested-by: Jaehoon Chung &lt;jh80.chung@samsung.com&gt;
Acked-by: Adrian Hunter &lt;adrian.hunter@intel.com&gt;
Signed-off-by: Ulf Hansson &lt;ulf.hansson@linaro.org&gt;
</content>
</entry>
<entry>
<title>mmc: mmc: Add driver strength selection</title>
<updated>2015-06-01T07:07:14Z</updated>
<author>
<name>Adrian Hunter</name>
<email>adrian.hunter@intel.com</email>
</author>
<published>2015-02-06T12:12:58Z</published>
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<id>urn:sha1:cc4f414c885cd04f7227ad9bcd6b18fd78d718d9</id>
<content type='text'>
Add the ability to set eMMC driver strength
for HS200 and HS400.

Signed-off-by: Adrian Hunter &lt;adrian.hunter@intel.com&gt;
Signed-off-by: Ulf Hansson &lt;ulf.hansson@linaro.org&gt;
</content>
</entry>
<entry>
<title>mmc: mmc: Read card's valid driver strength mask</title>
<updated>2015-06-01T07:07:13Z</updated>
<author>
<name>Adrian Hunter</name>
<email>adrian.hunter@intel.com</email>
</author>
<published>2015-02-06T12:12:57Z</published>
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<id>urn:sha1:b097e07f57930eda774c83aa46e8e401686d01dc</id>
<content type='text'>
In preparation for supporing drive strength selection
for eMMC, read the card's valid driver strengths.

Note that though the SD spec uses the term "drive strength",
the JEDEC eMMC spec uses the term "driver strength".

Signed-off-by: Adrian Hunter &lt;adrian.hunter@intel.com&gt;
Signed-off-by: Ulf Hansson &lt;ulf.hansson@linaro.org&gt;
</content>
</entry>
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