<feed xmlns='http://www.w3.org/2005/Atom'>
<title>user/sven/linux.git/include/linux/mmc, branch v6.1.87</title>
<subtitle>Linux Kernel
</subtitle>
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<updated>2024-02-23T08:12:48Z</updated>
<entry>
<title>wifi: mwifiex: Support SD8978 chipset</title>
<updated>2024-02-23T08:12:48Z</updated>
<author>
<name>Lukas Wunner</name>
<email>lukas@wunner.de</email>
</author>
<published>2023-01-27T14:02:00Z</published>
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<id>urn:sha1:48b348232070035410d8a58ff5ee18c221785cdd</id>
<content type='text'>
[ Upstream commit bba047f15851c8b053221f1b276eb7682d59f755 ]

The Marvell SD8978 (aka NXP IW416) uses identical registers as SD8987,
so reuse the existing mwifiex_reg_sd8987 definition.

Note that mwifiex_reg_sd8977 and mwifiex_reg_sd8997 are likewise
identical, save for the fw_dump_ctrl register:  They define it as 0xf0
whereas mwifiex_reg_sd8987 defines it as 0xf9.  I've verified that
0xf9 is the correct value on SD8978.  NXP's out-of-tree driver uses
0xf9 for all of them, so there's a chance that 0xf0 is not correct
in the mwifiex_reg_sd8977 and mwifiex_reg_sd8997 definitions.  I cannot
test that for lack of hardware, hence am leaving it as is.

NXP has only released a firmware which runs Bluetooth over UART.
Perhaps Bluetooth over SDIO is unsupported by this chipset.
Consequently, only an "sdiouart" firmware image is referenced, not an
alternative "sdsd" image.

Signed-off-by: Lukas Wunner &lt;lukas@wunner.de&gt;
Signed-off-by: Kalle Valo &lt;kvalo@kernel.org&gt;
Link: https://lore.kernel.org/r/536b4f17a72ca460ad1b07045757043fb0778988.1674827105.git.lukas@wunner.de
Stable-dep-of: 1c5d463c0770 ("wifi: mwifiex: add extra delay for firmware ready")
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>mmc: core: add helpers mmc_regulator_enable/disable_vqmmc</title>
<updated>2023-12-08T07:51:19Z</updated>
<author>
<name>Heiner Kallweit</name>
<email>hkallweit1@gmail.com</email>
</author>
<published>2023-03-11T22:39:55Z</published>
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<id>urn:sha1:38d3216032c95a6dceb4fea829ec63e38250bef1</id>
<content type='text'>
[ Upstream commit 8d91f3f8ae57e6292142ca89f322e90fa0d6ac02 ]

There's a number of drivers (e.g. dw_mmc, meson-gx, mmci, sunxi) using
the same mechanism and a private flag vqmmc_enabled to deal with
enabling/disabling the vqmmc regulator.

Move this to the core and create new helpers mmc_regulator_enable_vqmmc
and mmc_regulator_disable_vqmmc.

Signed-off-by: Heiner Kallweit &lt;hkallweit1@gmail.com&gt;
Acked-by: Martin Blumenstingl &lt;martin.blumenstingl@googlemail.com&gt;
Link: https://lore.kernel.org/r/71586432-360f-9b92-17f6-b05a8a971bc2@gmail.com
Signed-off-by: Ulf Hansson &lt;ulf.hansson@linaro.org&gt;
Stable-dep-of: 477865af60b2 ("mmc: sdhci-sprd: Fix vqmmc not shutting down after the card was pulled")
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>mmc: Add quirk MMC_QUIRK_BROKEN_CACHE_FLUSH for Micron eMMC Q2J54A</title>
<updated>2023-11-28T17:07:11Z</updated>
<author>
<name>Bean Huo</name>
<email>beanhuo@micron.com</email>
</author>
<published>2023-10-30T22:48:09Z</published>
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<id>urn:sha1:51dcd20a4a2566e4749fbb6bdc4e298f7e23a530</id>
<content type='text'>
commit ed9009ad300c0f15a3ecfe9613547b1962bde02c upstream.

Micron MTFC4GACAJCN eMMC supports cache but requires that flush cache
operation be allowed only after a write has occurred. Otherwise, the
cache flush command or subsequent commands will time out.

Signed-off-by: Bean Huo &lt;beanhuo@micron.com&gt;
Signed-off-by: Rafael Beims &lt;rafael.beims@toradex.com&gt;
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20231030224809.59245-1-beanhuo@iokpp.de
Signed-off-by: Ulf Hansson &lt;ulf.hansson@linaro.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>mmc: Add MMC_QUIRK_BROKEN_SD_CACHE for Kingston Canvas Go Plus from 11/2019</title>
<updated>2023-07-19T14:21:10Z</updated>
<author>
<name>Marek Vasut</name>
<email>marex@denx.de</email>
</author>
<published>2023-06-20T10:27:13Z</published>
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<id>urn:sha1:ed98f5c074917e0a75fc91d01eeec632fa6d66ca</id>
<content type='text'>
[ Upstream commit c467c8f081859d4f4ca4eee4fba54bb5d85d6c97 ]

This microSD card never clears Flush Cache bit after cache flush has
been started in sd_flush_cache(). This leads e.g. to failure to mount
file system. Add a quirk which disables the SD cache for this specific
card from specific manufacturing date of 11/2019, since on newer dated
cards from 05/2023 the cache flush works correctly.

Fixes: 08ebf903af57 ("mmc: core: Fixup support for writeback-cache for eMMC and SD")
Signed-off-by: Marek Vasut &lt;marex@denx.de&gt;
Link: https://lore.kernel.org/r/20230620102713.7701-1-marex@denx.de
Signed-off-by: Ulf Hansson &lt;ulf.hansson@linaro.org&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>mmc: core: Fix ambiguous TRIM and DISCARD arg</title>
<updated>2022-11-18T09:39:22Z</updated>
<author>
<name>Christian Löhle</name>
<email>CLoehle@hyperstone.com</email>
</author>
<published>2022-11-17T14:42:09Z</published>
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<id>urn:sha1:489d144563f23911262a652234b80c70c89c978b</id>
<content type='text'>
Clean up the MMC_TRIM_ARGS define that became ambiguous with DISCARD
introduction.  While at it, let's fix one usage where MMC_TRIM_ARGS falsely
included DISCARD too.

Fixes: b3bf915308ca ("mmc: core: new discard feature support at eMMC v4.5")
Signed-off-by: Christian Loehle &lt;cloehle@hyperstone.com&gt;
Acked-by: Adrian Hunter &lt;adrian.hunter@intel.com&gt;
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/11376b5714964345908f3990f17e0701@hyperstone.com
Signed-off-by: Ulf Hansson &lt;ulf.hansson@linaro.org&gt;
</content>
</entry>
<entry>
<title>mmc: core: Add SD card quirk for broken discard</title>
<updated>2022-10-06T11:31:13Z</updated>
<author>
<name>Avri Altman</name>
<email>avri.altman@wdc.com</email>
</author>
<published>2022-09-28T09:57:44Z</published>
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<id>urn:sha1:07d2872bf4c864eb83d034263c155746a2fb7a3b</id>
<content type='text'>
Some SD-cards from Sandisk that are SDA-6.0 compliant reports they supports
discard, while they actually don't. This might cause mk2fs to fail while
trying to format the card and revert it to a read-only mode.

To fix this problem, let's add a card quirk (MMC_QUIRK_BROKEN_SD_DISCARD)
to indicate that we shall fall-back to use the legacy erase command
instead.

Signed-off-by: Avri Altman &lt;avri.altman@wdc.com&gt;
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20220928095744.16455-1-avri.altman@wdc.com
[Ulf: Updated the commit message]
Signed-off-by: Ulf Hansson &lt;ulf.hansson@linaro.org&gt;
</content>
</entry>
<entry>
<title>Merge tag 'mmc-v6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc</title>
<updated>2022-10-05T17:00:19Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2022-10-05T17:00:19Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=c3f13bbfc2f0240743a4d03a8a890d03730f5a6d'/>
<id>urn:sha1:c3f13bbfc2f0240743a4d03a8a890d03730f5a6d</id>
<content type='text'>
Pull MMC updates from Ulf Hansson:

 - dt-bindings: Increase maximum supported frequency to 384MHz

 - dw_mmc-rockchip: Add support for the rk3128 variant

 - meson-gx: Add support for SDIO interrupts

 - mtk-sd: Add support for MT6795 Helio X10 variant

 - sdhci: Improve the code by centralizing the CMD/DATA reset handling

 - sdhci-msm:
     - Add support for the sdm670 variant
     - Add support for the sm6115 variant

 - sdhci-omap: Make Vignesh replace Kishon as the maintainer

 - sdhci-pci-o2micro: Disable fragile support for DDR50 in favor of
   SDR50

 - sdhci-sprd: Fix clock divider limitation

* tag 'mmc-v6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc: (31 commits)
  mmc: sdhci: Centralize CMD and DATA reset handling
  mmc: sdhci: Get rid of SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS
  mmc: sdhci: Remove misleading comment about resets
  mmc: sdhci: Separate out sdhci_reset_for_all()
  MAINTAINERS: Add Vignesh as maintainer of TI SDHCI OMAP DRIVER
  mmc: sdhci-msm: add compatible string check for sdm670
  dt-bindings: mmc: sdhci-msm: add sdm670 compatible
  mmc: wmt-sdmmc: Fix an error handling path in wmt_mci_probe()
  mmc: rtsx_usb_sdmmc: Remove the unneeded result variable
  mmc: sdhci-of-aspeed: Add dependency on ARCH_ASPEED
  mmc: mtk-sd: Add support for MT6795 Helio X10
  mmc: mtk-sd: Reorder of_device_id and platform data by name
  mmc: sdhci-sprd: Fix the limitation of div
  dt-bindings: mmc: sdhci-msm: Add pinctrl-1 property
  dt-bindings: mmc: rockchip: add rockchip,rk3128-dw-mshc
  dt-bindings: mmc: renesas,sdhi: Add iommus property
  mmc: sdhci_am654: Remove the unneeded result variable
  mmc: meson-gx: add SDIO interrupt support
  mmc: meson-gx: adjust and re-use constant IRQ_EN_MASK
  mmc: jz4740_mmc: Fix error check for dma_map_sg
  ...
</content>
</entry>
<entry>
<title>mmc: core: Switch to basic workqueue API for sdio_irq_work</title>
<updated>2022-09-14T09:53:47Z</updated>
<author>
<name>Heiner Kallweit</name>
<email>hkallweit1@gmail.com</email>
</author>
<published>2022-08-19T21:26:17Z</published>
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<id>urn:sha1:1dd611a9c55f6657328429b988e302323691c3dc</id>
<content type='text'>
The delay parameter isn't set by any user, therefore simplify the code
and switch to the basic workqueue API w/o delay support. This also
reduces the size of struct mmc_host.

Signed-off-by: Heiner Kallweit &lt;hkallweit1@gmail.com&gt;
Link: https://lore.kernel.org/r/13d8200a-e2a8-d907-38ce-a16fc5ce14aa@gmail.com
Signed-off-by: Ulf Hansson &lt;ulf.hansson@linaro.org&gt;
</content>
</entry>
<entry>
<title>wifi: brcmfmac: add 43439 SDIO ids and initialization</title>
<updated>2022-09-07T08:01:15Z</updated>
<author>
<name>Marek Vasut</name>
<email>marex@denx.de</email>
</author>
<published>2022-08-27T02:49:03Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=be376df724aa3b7abdf79390eaab60c58a92f4f0'/>
<id>urn:sha1:be376df724aa3b7abdf79390eaab60c58a92f4f0</id>
<content type='text'>
Add HW and SDIO ids for use with the muRata 1YN (Cypress CYW43439).
Add the firmware mapping structures for the CYW43439 chipset.
The 43439 needs some things setup similar to the 43430 chipset.

Signed-off-by: Marek Vasut &lt;marex@denx.de&gt;
Signed-off-by: Kalle Valo &lt;kvalo@kernel.org&gt;
Link: https://lore.kernel.org/r/20220827024903.617294-1-marex@denx.de
</content>
</entry>
<entry>
<title>mmc: core: Add support for SDIO wakeup interrupt</title>
<updated>2022-07-26T14:58:31Z</updated>
<author>
<name>Axe Yang</name>
<email>axe.yang@mediatek.com</email>
</author>
<published>2022-07-26T06:28:41Z</published>
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<id>urn:sha1:019e442bb0d5e7f25ada8eb4252e22e62d17a95e</id>
<content type='text'>
If wakeup-source flag is set in host dts node, parse EAI information
from SDIO CCCR interrupt externsion segment for in-band wakeup. If
async interrupt is supported by SDIO card then enable it and set
enable_async_irq flag in sdio_cccr structure to 1. The parse flow is
implemented in sdio_read_cccr().

Reviewed-by: AngeloGioacchino Del Regno &lt;angelogioacchino.delregno@collabora.com&gt;
Signed-off-by: Axe Yang &lt;axe.yang@mediatek.com&gt;
Link: https://lore.kernel.org/r/20220726062842.18846-3-axe.yang@mediatek.com
Signed-off-by: Ulf Hansson &lt;ulf.hansson@linaro.org&gt;
</content>
</entry>
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