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<title>user/sven/linux.git/include/linux/mtd/fsmc.h, branch v3.4.78</title>
<subtitle>Linux Kernel
</subtitle>
<id>https://git.stealer.net/cgit.cgi/user/sven/linux.git/atom?h=v3.4.78</id>
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<updated>2012-03-27T00:01:07Z</updated>
<entry>
<title>mtd: Add device-tree support to fsmc_nand</title>
<updated>2012-03-27T00:01:07Z</updated>
<author>
<name>Stefan Roese</name>
<email>sr@denx.de</email>
</author>
<published>2012-03-16T09:19:31Z</published>
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<id>urn:sha1:eea628199d5b12429c47db17035a954b0062e554</id>
<content type='text'>
This patch adds support to configure the FSMC NAND driver (used amongst
others on SPEAr platforms) via device-tree instead of platform_data.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
Signed-off-by: Artem Bityutskiy &lt;artem.bityutskiy@linux.intel.com&gt;
Signed-off-by: David Woodhouse &lt;David.Woodhouse@intel.com&gt;
</content>
</entry>
<entry>
<title>mtd: nand/fsmc: Remove sparse warnings and errors</title>
<updated>2012-03-27T00:00:30Z</updated>
<author>
<name>Vipin Kumar</name>
<email>vipin.kumar@st.com</email>
</author>
<published>2012-03-14T06:17:19Z</published>
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<id>urn:sha1:2a5dbead29a7c081a47133eb428440147a6d8d5a</id>
<content type='text'>
This patch removes the sparse below warnings and errors for nand/fsmc driver
/root/vipin/spear/kernel/3.3/linux-3.3/drivers/mtd/nand/fsmc_nand.c:363:31:
warning: incorrect type in initializer (different address spaces)
/root/vipin/spear/kernel/3.3/linux-3.3/drivers/mtd/nand/fsmc_nand.c:363:31:
expected struct fsmc_regs *regs
/root/vipin/spear/kernel/3.3/linux-3.3/drivers/mtd/nand/fsmc_nand.c:363:31:
got void [noderef] &lt;asn:2&gt;*regs_va

[...]

Signed-off-by: Vipin Kumar &lt;vipin.kumar@st.com&gt;
Signed-off-by: Artem Bityutskiy &lt;artem.bityutskiy@linux.intel.com&gt;
Signed-off-by: David Woodhouse &lt;David.Woodhouse@intel.com&gt;
</content>
</entry>
<entry>
<title>mtd: nand/fsmc: Add DMA support</title>
<updated>2012-03-27T00:00:24Z</updated>
<author>
<name>Vipin Kumar</name>
<email>vipin.kumar@st.com</email>
</author>
<published>2012-03-14T06:17:18Z</published>
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<id>urn:sha1:4774fb0a48aacfec206e6d54ecf58706f6a5320a</id>
<content type='text'>
The fsmc_nand driver uses cpu to read/write onto the device. This is inefficient
because of two reasons
- the cpu gets locked on AHB bus while reading from NAND
- the cpu is unnecessarily used when dma can do the job

This patch adds the support for accessing the device through DMA

Signed-off-by: Vipin Kumar &lt;vipin.kumar@st.com&gt;
Reviewed-by: Viresh Kumar &lt;viresh.kumar@st.com&gt;
Signed-off-by: Artem Bityutskiy &lt;artem.bityutskiy@linux.intel.com&gt;
Signed-off-by: David Woodhouse &lt;David.Woodhouse@intel.com&gt;
</content>
</entry>
<entry>
<title>mtd: nand/fsmc: Access the NAND device word by word whenever possible</title>
<updated>2012-03-27T00:00:14Z</updated>
<author>
<name>Vipin Kumar</name>
<email>vipin.kumar@st.com</email>
</author>
<published>2012-03-14T06:17:17Z</published>
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<id>urn:sha1:604e75444fa82cfdcba339e3bd4da1dfd6947539</id>
<content type='text'>
The default way of accessing nand device is using the nand width. This means
that 8bit devices are using u8 * and 16bit devices are accessed using u16 *.

This results in a non-optimal performance since the FSMC is designed to
translate the normal word accesses into device width based accesses. This patch
implements read_buf and write_buf callbacks using word by word accesses.

Signed-off-by: Vipin Kumar &lt;vipin.kumar@st.com&gt;
Reviewed-by: Viresh Kumar &lt;viresh.kumar@st.com&gt;
Signed-off-by: Artem Bityutskiy &lt;artem.bityutskiy@linux.intel.com&gt;
Signed-off-by: David Woodhouse &lt;David.Woodhouse@intel.com&gt;
</content>
</entry>
<entry>
<title>mtd: nand/fsmc: Modify fsmc driver to accept nand timing parameters via platform</title>
<updated>2012-03-26T23:59:34Z</updated>
<author>
<name>Vipin Kumar</name>
<email>vipin.kumar@st.com</email>
</author>
<published>2012-03-14T06:17:14Z</published>
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<id>urn:sha1:e2f6bce8d94d2c82d4f7ae9d94743963a3b10136</id>
<content type='text'>
FSMC controllers provide registers to program the required timing values for
attached NAND device. The timing values used until now are relaxed and should
work for all devices.

Although, for read/write performance improvements, the fsmc nand driver should
accept nand timings as a platform data and program the timing parameters into
fsmc registers accordingly.

This patch implements this modification. Additionally, it programs the default
timing parameters if these are not passed via platform data.

Signed-off-by: Vipin Kumar &lt;vipin.kumar@st.com&gt;
Signed-off-by: Artem Bityutskiy &lt;artem.bityutskiy@linux.intel.com&gt;
Signed-off-by: David Woodhouse &lt;David.Woodhouse@intel.com&gt;
</content>
</entry>
<entry>
<title>mtd: fsmc: Move ALE, CLE defines to their respective platform</title>
<updated>2012-03-26T23:46:19Z</updated>
<author>
<name>Shiraz Hashim</name>
<email>shiraz.hashim@st.com</email>
</author>
<published>2012-03-07T11:30:52Z</published>
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<id>urn:sha1:02bfc4ebbd2532440fadd78076f3a51e0ae89f7f</id>
<content type='text'>
Address Latch Enable (ALE) and Command Latch Enable (CLE) defines are
platform specific and were wrongly put in driver specific fsmc.h file.
Move such defines to their respective platform.

Also instead of relying on fsmc driver, pass ALE, CLE offsets explicitly
from individual platform.

Signed-off-by: Shiraz Hashim &lt;shiraz.hashim@st.com&gt;
Signed-off-by: Artem Bityutskiy &lt;artem.bityutskiy@linux.intel.com&gt;
Signed-off-by: David Woodhouse &lt;David.Woodhouse@intel.com&gt;
</content>
</entry>
<entry>
<title>mtd: fsmc: use ALE and CLE offsets from platform data</title>
<updated>2012-03-26T23:45:55Z</updated>
<author>
<name>Shiraz Hashim</name>
<email>shiraz.hashim@st.com</email>
</author>
<published>2012-03-07T11:30:51Z</published>
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<id>urn:sha1:b2acc92e144336dd29e30dc5d26439355be750b6</id>
<content type='text'>
ALE and CLE offsets can be different on different devices. Let devices
pass these offsets to the fsmc driver through platform data.

Signed-off-by: Shiraz Hashim &lt;shiraz.hashim@st.com&gt;
Signed-off-by: Artem Bityutskiy &lt;artem.bityutskiy@linux.intel.com&gt;
Signed-off-by: David Woodhouse &lt;David.Woodhouse@intel.com&gt;
</content>
</entry>
<entry>
<title>mtd: FSMC NAND fix obvious speling errors</title>
<updated>2010-12-03T16:35:40Z</updated>
<author>
<name>Linus Walleij</name>
<email>linus.walleij@stericsson.com</email>
</author>
<published>2010-11-29T12:52:27Z</published>
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<id>urn:sha1:b5602e86432aaf0cc90dd207bf74e3a2bfb5078b</id>
<content type='text'>
Fix spelling in the interface file.

Signed-off-by: Linus Walleij &lt;linus.walleij@stericsson.com&gt;
Signed-off-by: David Woodhouse &lt;David.Woodhouse@intel.com&gt;
</content>
</entry>
<entry>
<title>mtd: FSMC NAND use the PrimeCell identifier macros</title>
<updated>2010-12-03T16:35:30Z</updated>
<author>
<name>Linus Walleij</name>
<email>linus.walleij@stericsson.com</email>
</author>
<published>2010-11-29T12:52:19Z</published>
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<id>urn:sha1:593cd8711221c9661dbf9beb2fb42fecca03e693</id>
<content type='text'>
The FSMC actually has a standard ARM PrimeCell ID register, and
the "revision" part of that register contains the thing that
the code is looking at. Reuse the infrastructure from the AMBA
bus abstraction and rid local defines.

Signed-off-by: Linus Walleij &lt;linus.walleij@stericsson.com&gt;
Signed-off-by: David Woodhouse &lt;David.Woodhouse@intel.com&gt;
</content>
</entry>
<entry>
<title>mtd: fsmc.h: including linux/io.h for definition of readl</title>
<updated>2010-12-03T16:29:17Z</updated>
<author>
<name>Viresh Kumar</name>
<email>viresh.kumar@st.com</email>
</author>
<published>2010-11-08T05:47:54Z</published>
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<id>urn:sha1:65ab220c30bc2120eaa39753cadec68616e3f906</id>
<content type='text'>
Signed-off-by: Viresh Kumar &lt;viresh.kumar@st.com&gt;
Signed-off-by: Artem Bityutskiy &lt;Artem.Bityutskiy@nokia.com&gt;
Signed-off-by: David Woodhouse &lt;David.Woodhouse@intel.com&gt;
</content>
</entry>
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