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<title>user/sven/linux.git/include/linux/mtd/nand.h, branch v3.16.5</title>
<subtitle>Linux Kernel
</subtitle>
<id>https://git.stealer.net/cgit.cgi/user/sven/linux.git/atom?h=v3.16.5</id>
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<updated>2014-05-20T23:35:32Z</updated>
<entry>
<title>mtd: nand: Add support to use nand_base poi databuf as bounce buffer</title>
<updated>2014-05-20T23:35:32Z</updated>
<author>
<name>Kamal Dasu</name>
<email>kdasu.kdev@gmail.com</email>
</author>
<published>2014-05-02T00:51:19Z</published>
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<id>urn:sha1:66507c7bc8895f0da6b4ad87e96d61a9f7d7a118</id>
<content type='text'>
nand_base can be passed a kmap()'d buffers from highmem by
filesystems like jffs2. This results in failure to map the
physical address of the DMA buffer on various contoller
driver on different platforms. This change adds a chip option
to use preallocated databuf as bounce buffers used in
nand_do_read_ops() and nand_do_write_ops().
This allows for specific nand controller driver to set this
option as needed.

Signed-off-by: Kamal Dasu &lt;kdasu.kdev@gmail.com&gt;
Signed-off-by: Brian Norris &lt;computersforpeace@gmail.com&gt;
</content>
</entry>
<entry>
<title>mtd: nand: refactor erase_cmd() to return chip status</title>
<updated>2014-05-09T20:19:42Z</updated>
<author>
<name>Brian Norris</name>
<email>computersforpeace@gmail.com</email>
</author>
<published>2014-05-06T23:02:19Z</published>
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<id>urn:sha1:49c50b97b5522a987b80fbbf9d9869deee8d23b0</id>
<content type='text'>
The nand_chip::erase_cmd callback previously served a dual purpose; for
one, it allowed a per-flash-chip override, so that AG-AND devices could
use a different erase command than other NAND. These AND devices were
dropped in commit 14c6578683367b1e7af0c3c09e872b45a45183a7 (mtd: nand:
remove AG-AND support). On the other hand, some drivers (denali and
doc-g4) need to use this sort of callback to implement
controller-specific erase operations.

To make the latter operation easier for some drivers (e.g., ST's new BCH
NAND driver), it helps if the command dispatch and wait functions can be
lumped together, rather than called separately.

This patch does two things:
 1. Pull the call to chip-&gt;waitfunc() into chip-&gt;erase_cmd(), and return
    the status from this callback
 2. Rename erase_cmd() to just erase(), since this callback does a
    little more than just send a command

Signed-off-by: Brian Norris &lt;computersforpeace@gmail.com&gt;
Tested-by: Lee Jones &lt;lee.jones@linaro.org&gt;
</content>
</entry>
<entry>
<title>mtd: nand: fix GET/SET_FEATURES address on 16-bit devices</title>
<updated>2014-03-26T06:31:26Z</updated>
<author>
<name>David Mosberger</name>
<email>davidm@egauge.net</email>
</author>
<published>2014-03-21T22:05:10Z</published>
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<id>urn:sha1:e34fcb07a6d57411de6e15a47724fbe92c5caa42</id>
<content type='text'>
GET_FEATURES and SET_FEATURES also need byte-addressing on 16-bit devices.

Signed-off-by: David Mosberger &lt;davidm@egauge.net&gt;
Signed-off-by: Brian Norris &lt;computersforpeace@gmail.com&gt;
</content>
</entry>
<entry>
<title>mtd: nand: add "page" argument for read_subpage hook</title>
<updated>2014-03-11T05:42:30Z</updated>
<author>
<name>Huang Shijie</name>
<email>b32955@freescale.com</email>
</author>
<published>2014-01-03T03:01:40Z</published>
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<id>urn:sha1:e004debdadf1a661dcd24e2a654e56b0a113e29e</id>
<content type='text'>
Add the "page" argument for the read_subpage hook. With this argument,
the implementation of this hook could prints out more accurate information
for debugging.

Signed-off-by: Huang Shijie &lt;b32955@freescale.com&gt;
Signed-off-by: Brian Norris &lt;computersforpeace@gmail.com&gt;
</content>
</entry>
<entry>
<title>mtd: nand: parse out the JEDEC compliant NAND</title>
<updated>2014-03-11T05:42:27Z</updated>
<author>
<name>Huang Shijie</name>
<email>b32955@freescale.com</email>
</author>
<published>2014-02-21T05:39:40Z</published>
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<id>urn:sha1:913618185e51ee1fcbc193b2f121a9d072405619</id>
<content type='text'>
This patch adds the parsing code for the JEDEC compliant NAND.

Since we need the 0x40 as the column address, this patch also
makes the NAND_CMD_PARAM to use the 8-bit address only.

Signed-off-by: Huang Shijie &lt;b32955@freescale.com&gt;
Signed-off-by: Brian Norris &lt;computersforpeace@gmail.com&gt;
</content>
</entry>
<entry>
<title>mtd: nand: add a helper to get the supported features for JEDEC</title>
<updated>2014-03-11T05:42:26Z</updated>
<author>
<name>Huang Shijie</name>
<email>b32955@freescale.com</email>
</author>
<published>2014-02-21T05:39:39Z</published>
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<id>urn:sha1:7852f8962f0f022b11fc56d63de06226a9f70d88</id>
<content type='text'>
Add a helper to get the supported features for JEDEC compliant NAND.
Also add a macro JEDEC_FEATURE_16_BIT_BUS.

Signed-off-by: Huang Shijie &lt;b32955@freescale.com&gt;
Signed-off-by: Brian Norris &lt;computersforpeace@gmail.com&gt;
</content>
</entry>
<entry>
<title>mtd: nand: add fields for JEDEC in nand_chip</title>
<updated>2014-03-11T05:42:26Z</updated>
<author>
<name>Huang Shijie</name>
<email>b32955@freescale.com</email>
</author>
<published>2014-02-21T05:39:38Z</published>
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<id>urn:sha1:d94abba7605d3c15123eb3b331a1872ef17d29e0</id>
<content type='text'>
Add the jedec_version field, and add an anonymous union which
contains the nand_onfi_params and nand_jedec_params.

Signed-off-by: Huang Shijie &lt;b32955@freescale.com&gt;
Signed-off-by: Brian Norris &lt;computersforpeace@gmail.com&gt;
</content>
</entry>
<entry>
<title>mtd: nand: add the data structures for JEDEC parameter page</title>
<updated>2014-03-11T05:42:26Z</updated>
<author>
<name>Huang Shijie</name>
<email>b32955@freescale.com</email>
</author>
<published>2014-02-21T05:39:37Z</published>
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<id>urn:sha1:afbfff03d611de22b1ec7127ad56920e02936d5e</id>
<content type='text'>
Create the nand_jedec_params{} and jedec_ecc_info{} according to
the JESD230A (Revision of JESD230, October 2012).

Signed-off-by: Huang Shijie &lt;b32955@freescale.com&gt;
Signed-off-by: Brian Norris &lt;computersforpeace@gmail.com&gt;
</content>
</entry>
<entry>
<title>mtd: nand: force NAND_CMD_READID onto 8-bit bus</title>
<updated>2014-03-11T05:42:22Z</updated>
<author>
<name>Brian Norris</name>
<email>computersforpeace@gmail.com</email>
</author>
<published>2014-01-29T22:08:12Z</published>
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<id>urn:sha1:3dad2344e92c6e1aeae42df1c4824f307c51bcc7</id>
<content type='text'>
The NAND command helpers tend to automatically shift the column address
for x16 bus devices, since most commands expect a word address, not a
byte address. The Read ID command, however, expects an 8-bit address
(i.e., 0x00, 0x20, or 0x40 should not be translated to 0x00, 0x10, or
0x20).

This fixes the column address for a few drivers which imitate the
nand_base defaults. Note that I don't touch sh_flctl.c, since it already
handles this problem slightly differently (note its comment "READID is
always performed using an 8-bit bus").

I have not tested this patch, as I only have x8 parts up for testing at
this point. Hopefully that can change soon...

Signed-off-by: Brian Norris &lt;computersforpeace@gmail.com&gt;
Tested-by: Ezequiel Garcia &lt;ezequiel.garcia@free-electrons.com&gt;
Tested-By: Pekon Gupta &lt;pekon@ti.com&gt;
</content>
</entry>
<entry>
<title>mtd: nand: remove the NAND_MAX_PAGESIZE/NAND_MAX_OOBSIZE</title>
<updated>2014-03-11T05:42:22Z</updated>
<author>
<name>Huang Shijie</name>
<email>shijie8@gmail.com</email>
</author>
<published>2013-12-20T16:02:30Z</published>
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<id>urn:sha1:3f172cbdfbb799e35cc972fc9f7e43d0e971577b</id>
<content type='text'>
There is no reference to these two macros now.
Just remove them.

Signed-off-by: Huang Shijie &lt;shijie8@gmail.com&gt;
Signed-off-by: Brian Norris &lt;computersforpeace@gmail.com&gt;
</content>
</entry>
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