user/sven/linux.git/include/linux/mtd/nand.h, branch v4.4.25

mtd: nand: pass page number to ecc->write_xxx() methods

2015-10-13T19:56:49Z

The ->read_xxx() methods are all passed the page number the NAND controller is supposed to read, but ->write_xxx() do not have such a parameter. This is a problem if we want to properly implement data scrambling/randomization in order to mitigate MLC sensibility to repeated pattern: to prevent bitflips in adjacent pages in the same block we need to avoid repeating the same pattern at the same offset in those pages, hence the randomizer/scrambler engine need to be passed the page value in order to adapt its seed accordingly. Moreover, adding the page parameter to the ->write_xxx() methods add some consistency to the current API. Signed-off-by: Boris Brezillon CC: Josh Wu CC: Ezequiel Garcia CC: Maxime Ripard CC: Greg Kroah-Hartman CC: Huang Shijie CC: Stefan Agner CC: devel@driverdev.osuosl.org CC: linux-arm-kernel@lists.infradead.org CC: linux-kernel@vger.kernel.org Signed-off-by: Brian Norris

mtd: nand: remove unused ->init_size() hook

2015-10-01T17:20:15Z

The ->init_size() hook was introduced to let NAND controller drivers support NAND devices that could not be described in the nand_ids table. Since then, the core has added support for extended-id parsing and full-id description, thus allowing to describe pretty much all existing NANDs. Moreover, this hook is not used by any mainline driver, and should not be used by new drivers, because detecting the NAND chip is not something controller specific. Signed-off-by: Boris Brezillon Signed-off-by: Brian Norris

mtd: nand: add nand_check_erased helper functions

2015-09-21T22:35:04Z

Add two helper functions to help NAND controller drivers test whether a specific NAND region is erased or not. Signed-off-by: Boris Brezillon Signed-off-by: Brian Norris

mtd: nand: Rename nand_chip .dn to .flash_node

2015-09-11T22:48:43Z

Use a more descriptive name for the device_node element in struct nand_chip . This name matches the element name used for device_node property of a flash in the spi-nor framework. Signed-off-by: Marek Vasut Signed-off-by: Brian Norris

mtd: nand: Fix NAND_USE_BOUNCE_BUFFER flag conflict

2015-07-07T20:03:25Z

Commit 66507c7bc8895f0da6b ("mtd: nand: Add support to use nand_base poi databuf as bounce buffer") added a flag NAND_USE_BOUNCE_BUFFER using the same bit value as the existing NAND_BUSWIDTH_AUTO. Cc: Kamal Dasu Fixes: 66507c7bc8895f0da6b ("mtd: nand: Add support to use nand_base poi databuf as bounce buffer") Signed-off-by: Scott Wood Signed-off-by: Brian Norris

mtd: nand: add common DT init code

2015-05-11T23:22:29Z

These are already-documented common bindings for NAND chips. Let's handle them in nand_base. If NAND controller drivers need to act on this data before bringing up the NAND chip (e.g., fill out ECC callback functions, change HW modes, etc.), then they can do so between calling nand_scan_ident() and nand_scan_tail(). Signed-off-by: Brian Norris

mtd: nand_bbt: make nand_scan_bbt() static

2015-05-07T03:02:35Z

This implementation detail is no longer needed outside of nand_bbt.c. Signed-off-by: Brian Norris

mtd: nand: add ATO manufacturer info

2014-11-26T04:11:12Z

Tested with ATO AFND1G08U3, 128MiB NAND. Signed-off-by: Brian Norris

mtd: nand: provide detailed description for raw read/write page methods

2014-11-20T08:02:46Z

read_page_raw and write_page_raw method description is not clear enough. It clearly specifies that ECC correction should not be involved but does not talk about specific layout (by layout I mean where in-band and out-of-band data are stored on the NAND media) used by NAND/ECC controllers. Those specific layouts might impact MTD users and thus should be hidden (as already done in the standard NAND_ECC_HW_SYNDROME implementation). Clearly state this constraint in the nand_ecc_ctrl struct documentation. Signed-off-by: Boris Brezillon Signed-off-by: Brian Norris

mtd: nand: support ONFI timing mode retrieval for non-ONFI NANDs

2014-09-22T18:29:57Z

Add an onfi_timing_mode_default field to nand_chip and nand_flash_dev in order to support NAND timings definition for non-ONFI NAND. NAND that support better timings mode than the default one have to define a new entry in the nand_ids table. The default timing mode should be deduced from timings description from the datasheet and the ONFI specification (www.onfi.org/~/media/ONFI/specs/onfi_3_1_spec.pdf, chapter 4.15 "Timing Parameters"). You should choose the closest mode that fit the timings requirements of your NAND chip. Signed-off-by: Boris BREZILLON Signed-off-by: Brian Norris