<feed xmlns='http://www.w3.org/2005/Atom'>
<title>user/sven/linux.git/include/linux/mtd, branch v5.15.73</title>
<subtitle>Linux Kernel
</subtitle>
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<updated>2022-06-09T08:23:25Z</updated>
<entry>
<title>mtd: cfi_cmdset_0002: Use chip_ready() for write on S29GL064N</title>
<updated>2022-06-09T08:23:25Z</updated>
<author>
<name>Tokunori Ikegami</name>
<email>ikegami.t@gmail.com</email>
</author>
<published>2022-03-23T17:04:56Z</published>
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<id>urn:sha1:c925d688e4dcc0f16efd97f0d6ff56242a9de179</id>
<content type='text'>
commit 0a8e98305f63deaf0a799d5cf5532cc83af035d1 upstream.

Since commit dfeae1073583("mtd: cfi_cmdset_0002: Change write buffer to
check correct value") buffered writes fail on S29GL064N. This is
because, on S29GL064N, reads return 0xFF at the end of DQ polling for
write completion, where as, chip_good() check expects actual data
written to the last location to be returned post DQ polling completion.
Fix is to revert to using chip_good() for S29GL064N which only checks
for DQ lines to settle down to determine write completion.

Link: https://lore.kernel.org/r/b687c259-6413-26c9-d4c9-b3afa69ea124@pengutronix.de/
Fixes: dfeae1073583("mtd: cfi_cmdset_0002: Change write buffer to check correct value")
Cc: stable@vger.kernel.org
Signed-off-by: Tokunori Ikegami &lt;ikegami.t@gmail.com&gt;
Acked-by: Vignesh Raghavendra &lt;vigneshr@ti.com&gt;
Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Link: https://lore.kernel.org/linux-mtd/20220323170458.5608-3-ikegami.t@gmail.com
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>mtd: fix 'part' field data corruption in mtd_info</title>
<updated>2022-05-09T07:14:34Z</updated>
<author>
<name>Oleksandr Ocheretnyi</name>
<email>oocheret@cisco.com</email>
</author>
<published>2022-04-17T18:46:47Z</published>
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<id>urn:sha1:291ee6787b3503786a4444d328770b324e2df7f9</id>
<content type='text'>
[ Upstream commit 37c5f9e80e015d0df17d0c377c18523002986851 ]

Commit 46b5889cc2c5 ("mtd: implement proper partition handling")
started using "mtd_get_master_ofs()" in mtd callbacks to determine
memory offsets by means of 'part' field from mtd_info, what previously
was smashed accessing 'master' field in the mtd_set_dev_defaults() method.
That provides wrong offset what causes hardware access errors.

Just make 'part', 'master' as separate fields, rather than using
union type to avoid 'part' data corruption when mtd_set_dev_defaults()
is called.

Fixes: 46b5889cc2c5 ("mtd: implement proper partition handling")
Signed-off-by: Oleksandr Ocheretnyi &lt;oocheret@cisco.com&gt;
Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Link: https://lore.kernel.org/linux-mtd/20220417184649.449289-1-oocheret@cisco.com
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>mtd: rawnand: protect access to rawnand devices while in suspend</title>
<updated>2022-04-08T12:22:53Z</updated>
<author>
<name>Sean Nyekjaer</name>
<email>sean@geanix.com</email>
</author>
<published>2022-02-08T08:52:13Z</published>
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<id>urn:sha1:31d7d7f35045e52c0efe4bbf5beeea02dba6803b</id>
<content type='text'>
commit 8cba323437a49a45756d661f500b324fc2d486fe upstream.

Prevent rawnand access while in a suspended state.

Commit 013e6292aaf5 ("mtd: rawnand: Simplify the locking") allows the
rawnand layer to return errors rather than waiting in a blocking wait.

Tested on a iMX6ULL.

Fixes: 013e6292aaf5 ("mtd: rawnand: Simplify the locking")
Signed-off-by: Sean Nyekjaer &lt;sean@geanix.com&gt;
Reviewed-by: Boris Brezillon &lt;boris.brezillon@collabora.com&gt;
Cc: stable@vger.kernel.org
Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Link: https://lore.kernel.org/linux-mtd/20220208085213.1838273-1-sean@geanix.com
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>mtd: rawnand: Export nand_read_page_hwecc_oob_first()</title>
<updated>2022-01-27T10:02:49Z</updated>
<author>
<name>Paul Cercueil</name>
<email>paul@crapouillou.net</email>
</author>
<published>2021-10-16T13:22:27Z</published>
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<id>urn:sha1:abf8c8712b6d75335a89459389e41d26e04ef4ac</id>
<content type='text'>
commit d8466f73010faf71effb21228ae1cbf577dab130 upstream.

Move the function nand_read_page_hwecc_oob_first() (previously
nand_davinci_read_page_hwecc_oob_first()) to nand_base.c, and export it
as a GPL symbol, so that it can be used by more modules.

Cc: &lt;stable@vger.kernel.org&gt; # v5.2
Fixes: a0ac778eb82c ("mtd: rawnand: ingenic: Add support for the JZ4740")
Signed-off-by: Paul Cercueil &lt;paul@crapouillou.net&gt;
Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Link: https://lore.kernel.org/linux-mtd/20211016132228.40254-4-paul@crapouillou.net
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>Merge tag 'mtd/for-5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux</title>
<updated>2021-07-05T18:21:51Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2021-07-05T18:21:51Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=da85e7ed6993144a9ca43a1106c7f898626390a3'/>
<id>urn:sha1:da85e7ed6993144a9ca43a1106c7f898626390a3</id>
<content type='text'>
Pull MTD updates from Richard Weinberger:
 "MTD core changes:
   - Convert list_for_each to entry variant
   - Use MTD_DEVICE_ATTR_RO/RW() helper macros
   - Remove unnecessary OOM messages
   - Potential NULL dereference in mtd_otp_size()
   - Fix freeing of otp_info buffer
   - Create partname and partid debug files for child MTDs
   - tests:
      - Remove redundant assignment to err
      - Fix error return code in mtd_oobtest_init()
   - Add OTP NVMEM provider support
   - Allow specifying of_node
   - Convert sysfs sprintf/snprintf family to sysfs_emit

  Bindings changes:
   - Convert ti,am654-hbmc.txt to YAML schema
   - spi-nor: add otp property
   - Add OTP bindings
   - add YAML schema for the generic MTD bindings
   - Add brcm,trx-magic

  MTD device drivers changes:
   - Add support for microchip 48l640 EERAM
   - Remove superfluous "break"
   - sm_ftl:
      - Fix alignment of block comment
   - nftl:
      - Return -ENOMEM when kmalloc failed
   - nftlcore:
      - Remove set but rewrite variables
   - phram:
      - Fix error return code in phram_setup()
   - plat-ram:
      - Remove redundant dev_err call in platram_probe()

  MTD parsers changes:
   - Qcom:
      - Fix leaking of partition name
   - Redboot:
      - Fix style issues
      - Seek fis-index-block in the right node
   - trx:
      - Allow to use TRX parser on Mediatek SoCs
      - Allow to specify brcm, trx-magic in DT

  Raw NAND core:
   - Allow SDR timings to be nacked
   - Bring support for NV-DDR timings which involved a number of small
     preparation changes to bring new helpers, properly introduce NV-DDR
     structures, fill them, differenciate them and pick the best timing
     set.
   - Add the necessary infrastructure to parse the new gpio-cs property
     which aims at enlarging the number of available CS when a hardware
     controller is too constrained.
   - Update dead URL
   - Silence static checker warning in nand_setup_interface()
   - BBT:
      - Fix corner case in bad block table handling
   - onfi:
      - Use more recent ONFI specification wording
      - Use the BIT() macro when possible

  Raw NAND controller drivers:
   - Atmel:
      - Ensure the data interface is supported.
   - Arasan:
      - Finer grain NV-DDR configuration
      - Rename the data interface register
      - Use the right DMA mask
      - Leverage additional GPIO CS
      - Ensure proper configuration for the asserted target
      - Add support for the NV-DDR interface
      - Fix a macro parameter
   - brcmnand:
      - Convert bindings to json-schema
   - OMAP:
      - Various fixes and style improvements
      - Add larger page NAND chips support
   - PL35X:
      - New driver
   - QCOM:
      - Avoid writing to obsolete register
      - Delete an unneeded bool conversion
      - Allow override of partition parser
   - Marvell:
      - Minor documentation correction
      - Add missing clk_disable_unprepare() on error in
        marvell_nfc_resume()
   - R852:
      - Use DEVICE_ATTR_RO() helper macro
   - MTK:
      - Remove redundant dev_err call in mtk_ecc_probe()
   - HISI504:
      - Remove redundant dev_err call in probe

  SPI-NAND core:
   - Light reorganisation for the introduction of a core resume handler
   - Fix double counting of ECC stats

  SPI-NAND manufacturer drivers:
   - Macronix:
      - Add support for serial NAND flash

  SPI NOR core changes:
   - Ability to dump SFDP tables via sysfs
   - Support for erasing OTP regions on Winbond and similar flashes
   - Few API doc updates and fixes
   - Locking support for MX25L12805D

  SPI NOR controller drivers changes:
   - Use SPI_MODE_X_MASK in nxp-spifi
   - Intel Alder Lake-M SPI serial flash support"

* tag 'mtd/for-5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux: (125 commits)
  mtd: spi-nor: remove redundant continue statement
  mtd: rawnand: omap: Add larger page NAND chips support
  mtd: rawnand: omap: Various style fixes
  mtd: rawnand: omap: Check return values
  mtd: rawnand: omap: Rename a macro
  mtd: rawnand: omap: Aggregate the HW configuration of the ELM
  mtd: rawnand: pl353: Add support for the ARM PL353 SMC NAND controller
  dt-bindings: mtd: pl353-nand: Describe this hardware controller
  MAINTAINERS: Add PL353 NAND controller entry
  mtd: rawnand: qcom: avoid writing to obsolete register
  mtd: rawnand: marvell: Minor documentation correction
  mtd: rawnand: r852: use DEVICE_ATTR_RO() helper macro
  mtd: spinand: add SPI-NAND MTD resume handler
  mtd: spinand: Add spinand_init_flash() helper
  mtd: spinand: add spinand_read_cfg() helper
  mtd: rawnand: marvell: add missing clk_disable_unprepare() on error in marvell_nfc_resume()
  mtd: rawnand: arasan: Finer grain NV-DDR configuration
  mtd: rawnand: arasan: Rename the data interface register
  mtd: rawnand: onfi: Fix endianness when reading NV-DDR values
  mtd: rawnand: arasan: Use the right DMA mask
  ...
</content>
</entry>
<entry>
<title>Merge tag 'spi-nor/for-5.14' into mtd/next</title>
<updated>2021-06-30T10:52:24Z</updated>
<author>
<name>Miquel Raynal</name>
<email>miquel.raynal@bootlin.com</email>
</author>
<published>2021-06-30T10:52:24Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=0bcc3939c98d83955397eac1584d5f791fdc88d0'/>
<id>urn:sha1:0bcc3939c98d83955397eac1584d5f791fdc88d0</id>
<content type='text'>
SPI NOR core changes:
- Ability to dump SFDP tables via sysfs
- Support for erasing OTP regions on Winbond and similar flashes
- Few API doc updates and fixes
- Locking support for MX25L12805D

SPI NOR controller drivers changes:
- Use SPI_MODE_X_MASK in nxp-spifi
- Intel Alder Lake-M SPI serial flash support
</content>
</entry>
<entry>
<title>Merge tag 'nand/for-5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux into mtd/next</title>
<updated>2021-06-29T21:01:39Z</updated>
<author>
<name>Richard Weinberger</name>
<email>richard@nod.at</email>
</author>
<published>2021-06-29T21:01:39Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=600d050944e133fde1f54b9113b01ccefbd82820'/>
<id>urn:sha1:600d050944e133fde1f54b9113b01ccefbd82820</id>
<content type='text'>
Raw NAND core:
* Allow SDR timings to be nacked
* Bring support for NV-DDR timings which involved a number of small
  preparation changes to bring new helpers, properly introduce NV-DDR
  structures, fill them, differenciate them and pick the best timing set.
* Add the necessary infrastructure to parse the new gpio-cs property
  which aims at enlarging the number of available CS when a hardware
  controller is too constrained.
* Update dead URL
* Silence static checker warning in nand_setup_interface()
* BBT:
  - Fix corner case in bad block table handling
* onfi:
  - Use more recent ONFI specification wording
  - Use the BIT() macro when possible

Raw NAND controller drivers:
* Atmel:
  - Ensure the data interface is supported.
* Arasan:
  - Finer grain NV-DDR configuration
  - Rename the data interface register
  - Use the right DMA mask
  - Leverage additional GPIO CS
  - Ensure proper configuration for the asserted target
  - Add support for the NV-DDR interface
  - Fix a macro parameter
* brcmnand:
  - Convert bindings to json-schema
* OMAP:
  - Various fixes and style improvements
  - Add larger page NAND chips support
* PL35X:
  - New driver
* QCOM:
  - Avoid writing to obsolete register
  - Delete an unneeded bool conversion
  - Allow override of partition parser
* Marvell:
  - Minor documentation correction
  - Add missing clk_disable_unprepare() on error in marvell_nfc_resume()
* R852:
  - Use DEVICE_ATTR_RO() helper macro
* MTK:
  - Remove redundant dev_err call in mtk_ecc_probe()
* HISI504:
  - Remove redundant dev_err call in probe

SPI-NAND core:
* Light reorganisation for the introduction of a core resume handler
* Fix double counting of ECC stats

SPI-NAND manufacturer drivers:
* Macronix:
  - Add support for serial NAND flash
</content>
</entry>
<entry>
<title>mtd: spi-nor: sfdp: save a copy of the SFDP data</title>
<updated>2021-06-15T17:48:31Z</updated>
<author>
<name>Michael Walle</name>
<email>michael@walle.cc</email>
</author>
<published>2021-05-03T15:56:50Z</published>
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<id>urn:sha1:65b6d89d45a77256b743f421d109d469baefa688</id>
<content type='text'>
Due to possible mode switching to 8D-8D-8D, it might not be possible to
read the SFDP after the initial probe. To be able to dump the SFDP via
sysfs afterwards, make a complete copy of it.

Signed-off-by: Michael Walle &lt;michael@walle.cc&gt;
Signed-off-by: Vignesh Raghavendra &lt;vigneshr@ti.com&gt;
Tested-by: Heiko Thiery &lt;heiko.thiery@gmail.com&gt;
Reviewed-by: Pratyush Yadav &lt;p.yadav@ti.com&gt;
</content>
</entry>
<entry>
<title>mtd: spinand: use the spi-mem poll status APIs</title>
<updated>2021-06-03T13:04:57Z</updated>
<author>
<name>Patrice Chotard</name>
<email>patrice.chotard@foss.st.com</email>
</author>
<published>2021-05-18T16:27:53Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=8941cd8d295e40f8ea1c0a5045d6d068b8e33eec'/>
<id>urn:sha1:8941cd8d295e40f8ea1c0a5045d6d068b8e33eec</id>
<content type='text'>
Make use of spi-mem poll status APIs to let advanced controllers
optimize wait operations.
This should also fix the high CPU usage for system that don't have
a dedicated STATUS poll block logic.

Signed-off-by: Patrice Chotard &lt;patrice.chotard@foss.st.com&gt;
Signed-off-by: Christophe Kerello &lt;christophe.kerello@foss.st.com&gt;
Reviewed-by: Boris Brezillon &lt;boris.brezillon@collabora.com&gt;
Acked-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Link: https://lore.kernel.org/r/20210518162754.15940-3-patrice.chotard@foss.st.com
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
</entry>
<entry>
<title>mtd: rawnand: Add a helper to parse the gpio-cs DT property</title>
<updated>2021-05-26T14:26:32Z</updated>
<author>
<name>Miquel Raynal</name>
<email>miquel.raynal@bootlin.com</email>
</author>
<published>2021-05-26T09:32:40Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=b85c943d181ac58e3a34a5f79c73d421f4da7b00'/>
<id>urn:sha1:b85c943d181ac58e3a34a5f79c73d421f4da7b00</id>
<content type='text'>
New chips may feature a lot of CS because of their extended length. As
many controllers have been designed a decade ago, they usually only
feature just a couple. This does not mean that the entire range of
these chips cannot be accessed: it is just a matter of adding more
GPIO CS in the hardware design. A DT property has been added to
describe the CS array: cs-gpios.

Here is the code parsing it this new property, allocating what needs to
be, requesting the GPIOs and returning an array with the additional
available CS. The first entries of this array are left empty and are
reserved for native CS.

Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Link: https://lore.kernel.org/linux-mtd/20210526093242.183847-3-miquel.raynal@bootlin.com
</content>
</entry>
</feed>
