<feed xmlns='http://www.w3.org/2005/Atom'>
<title>user/sven/linux.git/include/linux/mtd, branch v5.4.187</title>
<subtitle>Linux Kernel
</subtitle>
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<updated>2020-11-01T11:01:05Z</updated>
<entry>
<title>mtd: lpddr: Fix bad logic in print_drs_error</title>
<updated>2020-11-01T11:01:05Z</updated>
<author>
<name>Gustavo A. R. Silva</name>
<email>gustavo@embeddedor.com</email>
</author>
<published>2020-04-27T19:50:37Z</published>
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<id>urn:sha1:c274d1f8baafedd565b14717fa209f8eb8e65c6a</id>
<content type='text'>
commit 1c9c02bb22684f6949d2e7ddc0a3ff364fd5a6fc upstream.

Update logic for broken test. Use a more common logging style.

It appears the logic in this function is broken for the
consecutive tests of

        if (prog_status &amp; 0x3)
                ...
        else if (prog_status &amp; 0x2)
                ...
        else (prog_status &amp; 0x1)
                ...

Likely the first test should be

        if ((prog_status &amp; 0x3) == 0x3)

Found by inspection of include files using printk.

Fixes: eb3db27507f7 ("[MTD] LPDDR PFOW definition")
Cc: stable@vger.kernel.org
Reported-by: Joe Perches &lt;joe@perches.com&gt;
Signed-off-by: Gustavo A. R. Silva &lt;gustavo@embeddedor.com&gt;
Acked-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Link: https://lore.kernel.org/linux-mtd/3fb0e29f5b601db8be2938a01d974b00c8788501.1588016644.git.gustavo@embeddedor.com
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>Merge tag 'mtd/for-5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux</title>
<updated>2019-09-21T17:59:54Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2019-09-21T17:59:54Z</published>
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<id>urn:sha1:4553d469d6f88028f185de57e771dd29aba10d90</id>
<content type='text'>
Pull MTD updates from Richard Weinberger:
 "MTD core changes:
   - add debugfs nodes for querying the flash name and id
   - mtd parser reorganization

  SPI NOR core changes:
   - always use bounce buffer for register read/writes
   - move m25p80 code in spi-nor.c
   - rework hwcaps selection for the spi-mem case
   - rework the core in order to move the manufacturer specific code out
     of it:
       - regroup flash parameters in 'struct spi_nor_flash_parameter'
       - add default_init() and post_sfdp() hooks to tweak the flash
         parameters
       - introduce the -&gt;set_4byte(), -&gt;convert_addr() and -&gt;setup()
         methods, to deal with manufacturer specific code
       - rework the SPI NOR lock/unlock logic
   - fix an error code in spi_nor_read_raw()
   - fix a memory leak bug
   - enable the debugfs for the partname and partid
   - add support for few flashes

  SPI NOR controller drivers changes:
   - intel-spi:
       - Whitelist 4B read commands
       - Add support for Intel Tiger Lake SPI serial flash
   - aspeed-smc: Add of_node_put()
   - hisi-sfc: add of_node_put()
   - cadence-quadspi: Fix QSPI RCU Schedule Stall

  NAND core:
   - Fixing typos
   - Adding missing of_node_put() in various drivers

  Raw NAND controller drivers:
   - Macronix: new controller driver
   - Omap2: fix the number of bitflips returned
   - Brcmnand: fix a pointer not iterating over all the page chunks
   - W90x900: driver removed
   - Onenand: fix a memory leak
   - Sharpsl: missing include guard
   - STM32: avoid warnings when building with W=1
   - Ingenic: fix a coccinelle warning
   - r852: call a helper to simplify the code

  CFI core:
   - Kill useless initializer in mtd_do_chip_probe()
   - Fix a rare write failure seen on some cfi_cmdset_0002 compliant
     Parallel NORs
   - Bunch of cleanups for cfi_cmdset_0002 driver's write functions by
     Tokunori Ikegami"

* tag 'mtd/for-5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux: (77 commits)
  mtd: pmc551: Remove set but not used variable 'soff_lo'
  mtd: cfi_cmdset_0002: Fix do_erase_chip() to get chip as erasing mode
  mtd: sm_ftl: Fix memory leak in sm_init_zone() error path
  mtd: parsers: Move CMDLINE parser
  mtd: parsers: Move OF parser
  mtd: parsers: Move BCM63xx parser
  mtd: parsers: Move BCM47xx parser
  mtd: parsers: Move TI AR7 parser
  mtd: pismo: Simplify getting the adapter of a client
  mtd: phram: Module parameters add writable permissions
  mtd: pxa2xx: Use ioremap_cache insted of ioremap_cached
  mtd: spi-nor: Rename "n25q512a" to "mt25qu512a (n25q512a)"
  mtd: spi-nor: Add support for mt35xu02g
  mtd: rawnand: omap2: Fix number of bitflips reporting with ELM
  mtd: rawnand: brcmnand: Fix ecc chunk calculation for erased page bitfips
  mtd: spi-nor: remove superfluous pass of nor-&gt;info-&gt;sector_size
  mtd: spi-nor: enable the debugfs for the partname and partid
  mtd: mtdcore: add debugfs nodes for querying the flash name and id
  mtd: spi-nor: hisi-sfc: Add of_node_put() before break
  mtd: spi-nor: aspeed-smc: Add of_node_put()
  ...
</content>
</entry>
<entry>
<title>Merge tag 'spi-nor/for-5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux into mtd/for-5.4</title>
<updated>2019-09-15T21:00:55Z</updated>
<author>
<name>Richard Weinberger</name>
<email>richard@nod.at</email>
</author>
<published>2019-09-15T21:00:55Z</published>
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<id>urn:sha1:560852a1d3aa1c8b087e5528a19f51191e2085e6</id>
<content type='text'>
MTD core changes:
- add debugfs nodes for querying the flash name and id

SPI NOR core changes:
- always use bounce buffer for register read/writes
- move m25p80 code in spi-nor.c
- rework hwcaps selection for the spi-mem case
- rework the core in order to move the manufacturer specific code
  out of it:
        - regroup flash parameters in 'struct spi_nor_flash_parameter'
        - add default_init() and post_sfdp() hooks to tweak the flash
          parameters
        - introduce the -&gt;set_4byte(), -&gt;convert_addr() and -&gt;setup()
          methods, to deal with manufacturer specific code
        - rework the SPI NOR lock/unlock logic
- fix an error code in spi_nor_read_raw()
- fix a memory leak bug
- enable the debugfs for the partname and partid
- add support for few flashes

SPI NOR controller drivers changes:
- intel-spi:
        - Whitelist 4B read commands
        - Add support for Intel Tiger Lake SPI serial flash
- aspeed-smc: Add of_node_put()
- hisi-sfc: Add of_node_put()
- cadence-quadspi: Fix QSPI RCU Schedule Stall
</content>
</entry>
<entry>
<title>mtd: Kill mount_mtd()</title>
<updated>2019-09-05T18:34:26Z</updated>
<author>
<name>David Howells</name>
<email>dhowells@redhat.com</email>
</author>
<published>2019-03-25T16:38:32Z</published>
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<id>urn:sha1:6d56e4184368e4fe611df0cd5aee78431f5eda3e</id>
<content type='text'>
Kill mount_mtd() as it has now been replaced by vfs_get_mtd_super() in the
new mount API and nothing now uses it.

Signed-off-by: David Howells &lt;dhowells@redhat.com&gt;
cc: David Woodhouse &lt;dwmw2@infradead.org&gt;
cc: Brian Norris &lt;computersforpeace@gmail.com&gt;
cc: Boris Brezillon &lt;bbrezillon@kernel.org&gt;
cc: Marek Vasut &lt;marek.vasut@gmail.com&gt;
cc: Richard Weinberger &lt;richard@nod.at&gt;
cc: linux-mtd@lists.infradead.org
Signed-off-by: Al Viro &lt;viro@zeniv.linux.org.uk&gt;
</content>
</entry>
<entry>
<title>mtd: Provide fs_context-aware mount_mtd() replacement</title>
<updated>2019-09-05T18:34:23Z</updated>
<author>
<name>David Howells</name>
<email>dhowells@redhat.com</email>
</author>
<published>2019-03-25T16:38:31Z</published>
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<id>urn:sha1:0f071004109d9c8de7023b9a64fa2ba3fa87cbed</id>
<content type='text'>
Provide a function, get_tree_mtd(), to replace mount_mtd(), using an
fs_context struct to hold the parameters.

Signed-off-by: David Howells &lt;dhowells@redhat.com&gt;
cc: David Woodhouse &lt;dwmw2@infradead.org&gt;
cc: Brian Norris &lt;computersforpeace@gmail.com&gt;
cc: Boris Brezillon &lt;bbrezillon@kernel.org&gt;
cc: Marek Vasut &lt;marek.vasut@gmail.com&gt;
cc: Richard Weinberger &lt;richard@nod.at&gt;
cc: linux-mtd@lists.infradead.org
Signed-off-by: Al Viro &lt;viro@zeniv.linux.org.uk&gt;
</content>
</entry>
<entry>
<title>mtd: mtdcore: add debugfs nodes for querying the flash name and id</title>
<updated>2019-08-29T07:36:47Z</updated>
<author>
<name>Zhuohao Lee</name>
<email>zhuohao@chromium.org</email>
</author>
<published>2019-06-30T16:07:10Z</published>
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<id>urn:sha1:1018c94be6ea073115f6bcf993d6492138d2b8e3</id>
<content type='text'>
Currently, we don't have vfs nodes for querying the underlying flash name
and flash id. This information is important especially when we want to
know the flash detail of the defective system. In order to support the
query, we add mtd_debugfs_populate() to create two debugfs nodes
(ie. partname and partid). The upper driver can assign the pointer to
partname and partid before calling mtd_device_register().

Signed-off-by: Zhuohao Lee &lt;zhuohao@chromium.org&gt;
Reviewed-by: Boris Brezillon &lt;boris.brezillon@collabora.com&gt;
Signed-off-by: Tudor Ambarus &lt;tudor.ambarus@microchip.com&gt;
</content>
</entry>
<entry>
<title>mtd: spi-nor: Add a -&gt;setup() method</title>
<updated>2019-08-28T09:40:29Z</updated>
<author>
<name>Tudor Ambarus</name>
<email>tudor.ambarus@microchip.com</email>
</author>
<published>2019-08-25T19:48:36Z</published>
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<id>urn:sha1:2d7ff858e5f683393f32b07e64e565877a2e4bcb</id>
<content type='text'>
nor-&gt;params.setup() configures the SPI NOR memory. Useful for SPI NOR
flashes that have peculiarities to the SPI NOR standard, e.g.
different opcodes, specific address calculation, page size, etc.
Right now the only user will be the S3AN chips, but other
manufacturers can implement it if needed.

Move spi_nor_setup() related code in order to avoid a forward
declaration to spi_nor_default_setup().

Signed-off-by: Tudor Ambarus &lt;tudor.ambarus@microchip.com&gt;
Reviewed-by: Boris Brezillon &lt;boris.brezillon@collabora.com&gt;
Reviewed-by: Vignesh Raghavendra &lt;vigneshr@ti.com&gt;
</content>
</entry>
<entry>
<title>mtd: spi-nor: Add a -&gt;convert_addr() method</title>
<updated>2019-08-28T09:40:29Z</updated>
<author>
<name>Boris Brezillon</name>
<email>boris.brezillon@bootlin.com</email>
</author>
<published>2019-08-24T07:17:20Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=36499596280359d34a0663afe0abbf34d80862e8'/>
<id>urn:sha1:36499596280359d34a0663afe0abbf34d80862e8</id>
<content type='text'>
In order to separate manufacturer quirks from the core we need to get
rid of all the manufacturer specific flags, like the
SNOR_F_S3AN_ADDR_DEFAULT one.

This can easily be replaced by a -&gt;convert_addr() hook, which when
implemented will provide the core with an easy way to convert an
absolute address into something the flash understands.

Right now the only user are the S3AN chips, but other manufacturers
can implement it if needed.

Signed-off-by: Boris Brezillon &lt;boris.brezillon@bootlin.com&gt;
Signed-off-by: Tudor Ambarus &lt;tudor.ambarus@microchip.com&gt;
Reviewed-by: Vignesh Raghavendra &lt;vigneshr@ti.com&gt;
</content>
</entry>
<entry>
<title>mtd: spi-nor: Rework the SPI NOR lock/unlock logic</title>
<updated>2019-08-28T09:40:28Z</updated>
<author>
<name>Boris Brezillon</name>
<email>boris.brezillon@bootlin.com</email>
</author>
<published>2019-08-24T06:22:03Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=dff972458acb05ab919b6950da99f8172ab14836'/>
<id>urn:sha1:dff972458acb05ab919b6950da99f8172ab14836</id>
<content type='text'>
Add the SNOR_F_HAS_LOCK flag and set it when SPI_NOR_HAS_LOCK is set
in the flash_info entry or when it's a Micron or ST flash.

Move the locking hooks in a separate struct so that we have just
one field to update when we change the locking implementation.

Signed-off-by: Boris Brezillon &lt;boris.brezillon@bootlin.com&gt;
[tudor.ambarus@microchip.com: use -&gt;default_init() hook, introduce
spi_nor_late_init_params(), set ops in nor-&gt;params]
Signed-off-by: Tudor Ambarus &lt;tudor.ambarus@microchip.com&gt;
Reviewed-by: Vignesh Raghavendra &lt;vigneshr@ti.com&gt;
</content>
</entry>
<entry>
<title>mtd: spi-nor: Create a -&gt;set_4byte() method</title>
<updated>2019-08-28T09:40:28Z</updated>
<author>
<name>Boris Brezillon</name>
<email>boris.brezillon@bootlin.com</email>
</author>
<published>2019-08-24T05:45:28Z</published>
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<id>urn:sha1:64c160f32235f725a5378c66fb3583c720357ab9</id>
<content type='text'>
The procedure used to enable 4 byte addressing mode depends on the NOR
device, so let's provide a hook so that manufacturer specific handling
can be implemented in a sane way.

Signed-off-by: Boris Brezillon &lt;boris.brezillon@bootlin.com&gt;
[tudor.ambarus@microchip.com: use nor-&gt;params.set_4byte() instead of
nor-&gt;set_4byte()]
Signed-off-by: Tudor Ambarus &lt;tudor.ambarus@microchip.com&gt;
Reviewed-by: Vignesh Raghavendra &lt;vigneshr@ti.com&gt;
</content>
</entry>
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