<feed xmlns='http://www.w3.org/2005/Atom'>
<title>user/sven/linux.git/include/linux/mtd, branch v5.8</title>
<subtitle>Linux Kernel
</subtitle>
<id>https://git.stealer.net/cgit.cgi/user/sven/linux.git/atom?h=v5.8</id>
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<updated>2020-06-03T07:21:52Z</updated>
<entry>
<title>Merge tag 'cfi/for-5.8' of gitolite.kernel.org:pub/scm/linux/kernel/git/mtd/linux into mtd/next</title>
<updated>2020-06-03T07:21:52Z</updated>
<author>
<name>Richard Weinberger</name>
<email>richard@nod.at</email>
</author>
<published>2020-06-03T07:21:52Z</published>
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<id>urn:sha1:48e9912e033050a9e5e895a58c2e5a826d7c6540</id>
<content type='text'>
CFI changes:

* Support the absence of protection registers for Intel CFI flashes
* Replace zero-length array with flexible-arrays
</content>
</entry>
<entry>
<title>Merge tag 'spi-nor/for-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux into mtd/next</title>
<updated>2020-06-01T17:51:58Z</updated>
<author>
<name>Richard Weinberger</name>
<email>richard@nod.at</email>
</author>
<published>2020-06-01T17:51:58Z</published>
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<id>urn:sha1:3f5540032f5dfd0af1205370e4548d6bb90db900</id>
<content type='text'>
SPI NOR core changes:
- add, update support and fix few flashes
- prepare BFPT parsing for JESD216 rev D
- kernel doc fixes
</content>
</entry>
<entry>
<title>mtd: rawnand: Add an invalid ECC mode to discriminate with valid ones</title>
<updated>2020-05-31T08:53:41Z</updated>
<author>
<name>Miquel Raynal</name>
<email>miquel.raynal@bootlin.com</email>
</author>
<published>2020-05-26T19:56:18Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=86f2b225adf4ecd2edfdc8541a7342645556ac3b'/>
<id>urn:sha1:86f2b225adf4ecd2edfdc8541a7342645556ac3b</id>
<content type='text'>
NAND ECC modes (or providers) have their own enumeration but, unlike
their algorithms counterpart, there is no invalid or uninitialized
value to discriminate between an error and having chosen a no-ECC
situation. Add an "invalid" entry for this purpose.

Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Reviewed-by: Boris Brezillon &lt;boris.brezillon@collabora.com&gt;
Link: https://lore.kernel.org/linux-mtd/20200526195633.11543-7-miquel.raynal@bootlin.com
</content>
</entry>
<entry>
<title>mtd: rawnand: Drop OOB_FIRST placement scheme</title>
<updated>2020-05-31T08:53:41Z</updated>
<author>
<name>Miquel Raynal</name>
<email>miquel.raynal@bootlin.com</email>
</author>
<published>2020-05-26T19:56:15Z</published>
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<id>urn:sha1:74e24cd2376d9cc4cfc6edad8610780b79fd5def</id>
<content type='text'>
This scheme has been introduced for the Davinci controller and means
that the OOB area must be read *before* the rest of the data. This has
nothing to do with the ECC in OOB placement as it could be understood
and most importantly, there is no point in having this function out of
the Davinci NAND controller driver. A DT property for this scheme has
been added but never used, even by the Davinci driver which only uses
this scheme to change the default nand_read_page().

Move the main read_page() helper into the Davinci driver and remove
the remaining boilerplate.

Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Reviewed-by: Boris Brezillon &lt;boris.brezillon@collabora.com&gt;
Link: https://lore.kernel.org/linux-mtd/20200526195633.11543-4-miquel.raynal@bootlin.com
</content>
</entry>
<entry>
<title>mtd: rawnand: Avoid a typedef</title>
<updated>2020-05-31T08:53:41Z</updated>
<author>
<name>Miquel Raynal</name>
<email>miquel.raynal@bootlin.com</email>
</author>
<published>2020-05-26T19:56:14Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=f66a6fd0dc7cc49c891a167937e161114f48a62e'/>
<id>urn:sha1:f66a6fd0dc7cc49c891a167937e161114f48a62e</id>
<content type='text'>
In new code, the use of typedef is discouraged. Turn this one in the
raw NAND core into a regular enumeration.

Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Reviewed-by: Boris Brezillon &lt;boris.brezillon@collabora.com&gt;
Link: https://lore.kernel.org/linux-mtd/20200526195633.11543-3-miquel.raynal@bootlin.com
</content>
</entry>
<entry>
<title>mtd: rawnand: Stop using nand_release()</title>
<updated>2020-05-31T08:53:40Z</updated>
<author>
<name>Miquel Raynal</name>
<email>miquel.raynal@bootlin.com</email>
</author>
<published>2020-05-19T13:00:35Z</published>
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<id>urn:sha1:9630a055256de420d528ecde9f35902a9dcd8750</id>
<content type='text'>
This helper is not very useful and very often people get confused:
they use nand_release() instead of nand_cleanup().

Now that all drivers have been converted to do not use nand_release()
anymore, let's remove this helper.

Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Cc: Jonathan Corbet &lt;corbet@lwn.net&gt;
Link: https://lore.kernel.org/linux-mtd/20200519130035.1883-63-miquel.raynal@bootlin.com
</content>
</entry>
<entry>
<title>mtd: spi-nor: Fix SPI NOR acronym</title>
<updated>2020-05-28T07:46:23Z</updated>
<author>
<name>Tudor Ambarus</name>
<email>tudor.ambarus@microchip.com</email>
</author>
<published>2020-04-28T08:47:43Z</published>
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<id>urn:sha1:1ac71ec0130cce5bed3ec11ffc88651097a24173</id>
<content type='text'>
The correct terminology is serial NOR flash or SPI NOR.
s/SPI-NOR/SPI NOR and s/spi-nor/SPI NOR across the subsystem.

Signed-off-by: Tudor Ambarus &lt;tudor.ambarus@microchip.com&gt;
Reviewed-by: Sergei Shtylyov &lt;sergei.shtylyov@cogentembedded.com&gt;
</content>
</entry>
<entry>
<title>mtd: Replace zero-length array with flexible-array</title>
<updated>2020-05-26T08:00:06Z</updated>
<author>
<name>Gustavo A. R. Silva</name>
<email>gustavoars@kernel.org</email>
</author>
<published>2020-05-07T19:00:33Z</published>
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<id>urn:sha1:11399346ac39a26ade2a90303d38ad318163c665</id>
<content type='text'>
The current codebase makes use of the zero-length array language
extension to the C90 standard, but the preferred mechanism to declare
variable-length types such as these ones is a flexible array member[1][2],
introduced in C99:

struct foo {
        int stuff;
        struct boo array[];
};

By making use of the mechanism above, we will get a compiler warning
in case the flexible array does not occur last in the structure, which
will help us prevent some kind of undefined behavior bugs from being
inadvertently introduced[3] to the codebase from now on.

Also, notice that, dynamic memory allocations won't be affected by
this change:

"Flexible array members have incomplete type, and so the sizeof operator
may not be applied. As a quirk of the original implementation of
zero-length arrays, sizeof evaluates to zero."[1]

sizeof(flexible-array-member) triggers a warning because flexible array
members have incomplete type[1]. There are some instances of code in
which the sizeof operator is being incorrectly/erroneously applied to
zero-length arrays and the result is zero. Such instances may be hiding
some bugs. So, this work (flexible-array member conversions) will also
help to get completely rid of those sorts of issues.

This issue was found with the help of Coccinelle.

[1] https://gcc.gnu.org/onlinedocs/gcc/Zero-Length.html
[2] https://github.com/KSPP/linux/issues/21
[3] commit 76497732932f ("cxgb3/l2t: Fix undefined behaviour")

Signed-off-by: Gustavo A. R. Silva &lt;gustavoars@kernel.org&gt;
Acked-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Signed-off-by: Vignesh Raghavendra &lt;vigneshr@ti.com&gt;
Link: https://lore.kernel.org/r/20200507190033.GA15215@embeddedor
</content>
</entry>
<entry>
<title>mtd: rawnand: Add nand_extract_bits()</title>
<updated>2020-05-24T20:34:55Z</updated>
<author>
<name>Miquel Raynal</name>
<email>miquel.raynal@bootlin.com</email>
</author>
<published>2020-05-19T07:45:45Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=d7904619ea0636411f40fb1f34057288c0783ecf'/>
<id>urn:sha1:d7904619ea0636411f40fb1f34057288c0783ecf</id>
<content type='text'>
There are cases where ECC bytes are not byte-aligned. Indeed, BCH
implies using a number of ECC bits, which are not always a multiple of
8. We then need a helper like nand_extract_bits() to extract these
syndromes from a buffer.

Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Reviewed-by: Boris Brezillon &lt;boris.brezillon@collabora.com&gt;
Link: https://lore.kernel.org/linux-mtd/20200519074549.23673-5-miquel.raynal@bootlin.com
</content>
</entry>
<entry>
<title>mtd: rawnand: Propage CS selection to sub operations</title>
<updated>2020-05-24T18:39:27Z</updated>
<author>
<name>Boris Brezillon</name>
<email>boris.brezillon@collabora.com</email>
</author>
<published>2020-05-05T10:13:35Z</published>
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<id>urn:sha1:1f1ec622623fe8e49a1036d4127b895a0f0e2c43</id>
<content type='text'>
Some controller using the instruction parse infrastructure might need
to know which CS a specific sub-operation is targeting. Let's propagate
this information.

Signed-off-by: Boris Brezillon &lt;boris.brezillon@collabora.com&gt;
Reviewed-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Link: https://lore.kernel.org/linux-mtd/20200505101353.1776394-2-boris.brezillon@collabora.com
</content>
</entry>
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