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<title>user/sven/linux.git/include/linux/nvme.h, branch v3.4.78</title>
<subtitle>Linux Kernel
</subtitle>
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<updated>2011-11-04T20:24:23Z</updated>
<entry>
<title>NVMe: Update Identify Controller data structure</title>
<updated>2011-11-04T20:24:23Z</updated>
<author>
<name>Matthew Wilcox</name>
<email>matthew.r.wilcox@intel.com</email>
</author>
<published>2011-11-04T20:24:23Z</published>
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<id>urn:sha1:010e646ba2fdfc558048a97da746381c35836280</id>
<content type='text'>
The driver was still using an old definition of Identify Controller
which only came to light once we started using the 'number of namespaces'
field properly.

Reported-by: Nisheeth Bhat &lt;nisheeth.bhat@intel.com&gt;
Reported-by: Khosrow Panah &lt;Khosrow.Panah@idt.com&gt;
Signed-off-by: Matthew Wilcox &lt;matthew.r.wilcox@intel.com&gt;
</content>
</entry>
<entry>
<title>NVMe: Implement doorbell stride capability</title>
<updated>2011-11-04T19:53:05Z</updated>
<author>
<name>Matthew Wilcox</name>
<email>matthew.r.wilcox@intel.com</email>
</author>
<published>2011-10-20T21:00:41Z</published>
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<id>urn:sha1:f1938f6e1ee1583c87ec74dc406fdd8694e99ac8</id>
<content type='text'>
The doorbell stride allows devices to spread out their doorbells instead
of packing them tightly.  This feature was added as part of ECN 003.

This patch also enables support for more than 512 queues :-)

Signed-off-by: Matthew Wilcox &lt;matthew.r.wilcox@intel.com&gt;
</content>
</entry>
<entry>
<title>NVMe: Rework ioctls</title>
<updated>2011-11-04T19:53:03Z</updated>
<author>
<name>Matthew Wilcox</name>
<email>matthew.r.wilcox@intel.com</email>
</author>
<published>2011-05-20T17:03:42Z</published>
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<id>urn:sha1:6bbf1acddeed0bfb345a5578f9fcada16f1e514f</id>
<content type='text'>
Remove the special-purpose IDENTIFY, GET_RANGE_TYPE, DOWNLOAD_FIRMWARE
and ACTIVATE_FIRMWARE commands.  Replace them with a generic ADMIN_CMD
ioctl that can submit any admin command.

Add a new ID ioctl that returns the namespace ID of the queried device.
It corresponds to the SCSI Idlun ioctl.

Signed-off-by: Matthew Wilcox &lt;matthew.r.wilcox@intel.com&gt;
</content>
</entry>
<entry>
<title>NVMe: Time out initialisation after a few seconds</title>
<updated>2011-11-04T19:53:02Z</updated>
<author>
<name>Matthew Wilcox</name>
<email>matthew.r.wilcox@intel.com</email>
</author>
<published>2011-04-19T19:04:20Z</published>
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<id>urn:sha1:22605f96810d073eb74051d0295b6577d6a6a563</id>
<content type='text'>
THe device reports (in its capability register) how long it will take
to initialise.  If that time elapses before the ready bit becomes set,
conclude the device is broken and refuse to initialise it.  Log a nice
error message so the user knows why we did nothing.

Signed-off-by: Matthew Wilcox &lt;matthew.r.wilcox@intel.com&gt;
</content>
</entry>
<entry>
<title>NVMe: Correct the Controller Configuration settings</title>
<updated>2011-11-04T19:53:01Z</updated>
<author>
<name>Matthew Wilcox</name>
<email>matthew.r.wilcox@intel.com</email>
</author>
<published>2011-03-22T19:55:45Z</published>
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<id>urn:sha1:7f53f9d2424533256ae86f7df5661a17de743de8</id>
<content type='text'>
The arbitration field was extended by one bit, shifting the shutdown
notification bits by one.  Also, the SQ/CQ entry size was made
configurable for future extensions.

Reported-by: Paul Luse &lt;paul.e.luse@intel.com&gt;
Signed-off-by: Matthew Wilcox &lt;matthew.r.wilcox@intel.com&gt;
</content>
</entry>
<entry>
<title>NVMe: Change the definition of nvme_user_io</title>
<updated>2011-11-04T19:53:01Z</updated>
<author>
<name>Matthew Wilcox</name>
<email>matthew.r.wilcox@intel.com</email>
</author>
<published>2011-03-21T13:48:57Z</published>
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<id>urn:sha1:6c7d49455ceb63064f992347d9185ff5bf43497a</id>
<content type='text'>
The read and write commands don't define a 'result', so there's no need
to copy it back to userspace.

Remove the ability of the ioctl to submit commands to a different
namespace; it's just asking for trouble, and the use case I have in mind
will be addressed througha  different ioctl in the future.  That removes
the need for both the block_shift and nsid arguments.

Check that the opcode is one of 'read' or 'write'.  Future opcodes may
be added in the future, but we will need a different structure definition
for them.

The nblocks field is redefined to be 0-based.  This allows the user to
request the full 65536 blocks.

Don't byteswap the reftag, apptag and appmask.  Martin Petersen tells
me these are calculated in big-endian and are transmitted to the device
in big-endian.

Signed-off-by: Matthew Wilcox &lt;matthew.r.wilcox@intel.com&gt;
</content>
</entry>
<entry>
<title>NVMe: Correct the definitions of two ioctls</title>
<updated>2011-11-04T19:53:01Z</updated>
<author>
<name>Matthew Wilcox</name>
<email>matthew.r.wilcox@intel.com</email>
</author>
<published>2011-03-20T11:27:10Z</published>
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<id>urn:sha1:9d4af1b7796ba02b73a79a8694399e5a3cd1c55d</id>
<content type='text'>
NVME_IOCTL_SUBMIT_IO has a struct nvme_user_io, not a struct nvme_rw_command
as a parameter, and NVME_IOCTL_DOWNLOAD_FW is a Write, not a Read.

Reported-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Signed-off-by: Matthew Wilcox &lt;matthew.r.wilcox@intel.com&gt;
</content>
</entry>
<entry>
<title>NVMe: Remove outdated comments</title>
<updated>2011-11-04T19:53:00Z</updated>
<author>
<name>Matthew Wilcox</name>
<email>matthew.r.wilcox@intel.com</email>
</author>
<published>2011-03-16T20:29:24Z</published>
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<id>urn:sha1:19e899b2f9f89f4a290dd5c9c24d15987a18ab21</id>
<content type='text'>
The head can never overrun the tail since we won't allocate enough command
IDs to let that happen.  The status codes are in sync with the spec.

Signed-off-by: Matthew Wilcox &lt;matthew.r.wilcox@intel.com&gt;
</content>
</entry>
<entry>
<title>NVMe: Update admin opcodes to match the 1.0RC spec</title>
<updated>2011-11-04T19:52:59Z</updated>
<author>
<name>Krzysztof Wierzbicki</name>
<email>krzysztof.wierzbicki@intel.com</email>
</author>
<published>2011-02-28T07:27:13Z</published>
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<id>urn:sha1:2ddc4f74d8adcf3e1cdec7f3e72d19b5c878597c</id>
<content type='text'>
Signed-off-by: Krzysztof Wierzbicki &lt;krzysztof.wierzbicki@intel.com&gt;
Signed-off-by: Matthew Wilcox &lt;willy@linux.intel.com&gt;
Signed-off-by: Matthew Wilcox &lt;matthew.r.wilcox@intel.com&gt;
</content>
</entry>
<entry>
<title>NVMe: Update BAR structure to match the current spec</title>
<updated>2011-11-04T19:52:57Z</updated>
<author>
<name>Matthew Wilcox</name>
<email>matthew.r.wilcox@intel.com</email>
</author>
<published>2011-02-14T17:20:15Z</published>
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<id>urn:sha1:897cfe1ce7db152fa6dde576f4213a6160bf6502</id>
<content type='text'>
Add two reserved registers in the middle of the BAR to match the 1.0
spec plus ECN 0002.

Also rename IMC and ISC to INTMC and INTSC to conform with the spec.
We still don't need to use them :-)

Signed-off-by: Matthew Wilcox &lt;matthew.r.wilcox@intel.com&gt;
</content>
</entry>
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