<feed xmlns='http://www.w3.org/2005/Atom'>
<title>user/sven/linux.git/include/linux/nvme.h, branch v4.7</title>
<subtitle>Linux Kernel
</subtitle>
<id>https://git.stealer.net/cgit.cgi/user/sven/linux.git/atom?h=v4.7</id>
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<updated>2016-05-02T15:13:35Z</updated>
<entry>
<title>NVMe: correct comment for offset enum of controller registers in nvme.h</title>
<updated>2016-05-02T15:13:35Z</updated>
<author>
<name>Wang Sheng-Hui</name>
<email>shhuiw@foxmail.com</email>
</author>
<published>2016-04-27T12:10:16Z</published>
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<id>urn:sha1:a5b714ad395803a6aa91793b9e52a81b176b8ba9</id>
<content type='text'>
Section 3.1 gives the comment for the offset of controller registers
in the specification 1.2a.

Some are mis-copied in the header file nvme.h. Correct them.

Signed-off-by: Wang Sheng-Hui &lt;shhuiw@foxmail.com&gt;
Reviewed-by: Christoph Hellwig &lt;hch@lst.de&gt;
Reviewed-by: Sagi Grimberg &lt;sagi@grimberg.me&gt;
Signed-off-by: Jens Axboe &lt;axboe@fb.com&gt;
</content>
</entry>
<entry>
<title>nvme: use offset instead of a struct for registers</title>
<updated>2015-12-01T17:59:38Z</updated>
<author>
<name>Christoph Hellwig</name>
<email>hch@lst.de</email>
</author>
<published>2015-11-20T07:58:10Z</published>
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<id>urn:sha1:7a67cbea653e444d04d7e850ab9631a14a196422</id>
<content type='text'>
This makes life easier for future non-PCI drivers where access to the
registers might be more complicated.  Note that Linux drivers are
pretty evenly split between the two versions, and in fact the NVMe
driver already uses offsets for the doorbells.

Signed-off-by: Christoph Hellwig &lt;hch@lst.de&gt;
Acked-by: Keith Busch &lt;keith.busch@intel.com&gt;
[Fixed CMBSZ offset]
Signed-off-by: Keith Busch &lt;keith.busch@intel.com&gt;
Signed-off-by: Jens Axboe &lt;axboe@fb.com&gt;
</content>
</entry>
<entry>
<title>nvme: include &lt;linux/types.ĥ&gt; in &lt;linux/nvme.h&gt;</title>
<updated>2015-10-09T16:40:37Z</updated>
<author>
<name>Christoph Hellwig</name>
<email>hch@lst.de</email>
</author>
<published>2015-10-09T16:19:20Z</published>
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<id>urn:sha1:2812dfe370516ef958b5c9e2eca1b2f002236d2d</id>
<content type='text'>
The buildbot complains about this even if it doesn't generate
a a build warning.  But it's an easy fix, so here we go:

Reported-by: kbuild test robot &lt;fengguang.wu@intel.com&gt;
Signed-off-by: Christoph Hellwig &lt;hch@lst.de&gt;
Signed-off-by: Jens Axboe &lt;axboe@fb.com&gt;
</content>
</entry>
<entry>
<title>nvme.h: add missing nvme_id_ctrl endianess annotations</title>
<updated>2015-10-09T16:40:37Z</updated>
<author>
<name>Christoph Hellwig</name>
<email>hch@lst.de</email>
</author>
<published>2015-10-02T13:27:16Z</published>
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<id>urn:sha1:08c69640cfcbdcc7aaed31c05bbfaf03bb60611c</id>
<content type='text'>
Signed-off-by: Christoph Hellwig &lt;hch@lst.de&gt;
Acked-by: Keith Busch &lt;keith.busch@intel.com&gt;
Signed-off-by: Jens Axboe &lt;axboe@fb.com&gt;
</content>
</entry>
<entry>
<title>nvme: move hardware structures out of the uapi version of nvme.h</title>
<updated>2015-10-09T16:40:37Z</updated>
<author>
<name>Christoph Hellwig</name>
<email>hch@lst.de</email>
</author>
<published>2015-10-02T13:25:49Z</published>
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<id>urn:sha1:9d99a8dda154f38307d43d9c9aa504bd3703d596</id>
<content type='text'>
Currently all NVMe command and completion structures are exposed to userspace
through the uapi version of nvme.h.  They are not an ABI between the kernel
and userspace, and will change in C-incompatible way for future versions of
the spec.  Move them to the kernel version of the file and rename the uapi
header to nvme_ioctl.h so that userspace can easily detect the presence of
the new clean header.  Nvme-cli already carries a local copy of the header,
so it won't be affected by this move.

Signed-off-by: Christoph Hellwig &lt;hch@lst.de&gt;
Acked-by: Keith Busch &lt;keith.busch@intel.com&gt;
Signed-off-by: Jens Axboe &lt;axboe@fb.com&gt;
</content>
</entry>
<entry>
<title>nvme: add a local nvme.h header</title>
<updated>2015-10-09T16:40:37Z</updated>
<author>
<name>Christoph Hellwig</name>
<email>hch@lst.de</email>
</author>
<published>2015-10-03T13:46:41Z</published>
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<id>urn:sha1:f11bb3e244c4b14e2d0a3b9d7e41895752997170</id>
<content type='text'>
Add a new drivers/block/nvme.h which contains all the driver internal
interface.

Signed-off-by: Christoph Hellwig &lt;hch@lst.de&gt;
Acked-by: Keith Busch &lt;keith.busch@intel.com&gt;
Signed-off-by: Jens Axboe &lt;axboe@fb.com&gt;
</content>
</entry>
<entry>
<title>NVMe: Simplify device resume on io queue failure</title>
<updated>2015-10-09T16:40:36Z</updated>
<author>
<name>Keith Busch</name>
<email>keith.busch@intel.com</email>
</author>
<published>2015-10-02T16:37:29Z</published>
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<id>urn:sha1:0a7385ad69f0f210c5cfbfd334b42423a6e05e5a</id>
<content type='text'>
Releasing IO queues and disks was done in a work queue outside the
controller resume context to delete namespaces if the controller failed
after a resume from suspend. This is unnecessary since we can resume
a device asynchronously.

This patch makes resume use probe_work so it can directly remove
namespaces if the device is manageable but not IO capable. Since the
deleting disks was the only reason we had the convoluted "reset_workfn",
this patch removes that unnecessary indirection.

Signed-off-by: Keith Busch &lt;keith.busch@intel.com&gt;
Reviewed-by: Christoph Hellwig &lt;hch@lst.de&gt;
Signed-off-by: Jens Axboe &lt;axboe@fb.com&gt;
</content>
</entry>
<entry>
<title>NVMe: Reference count open namespaces</title>
<updated>2015-10-09T16:40:36Z</updated>
<author>
<name>Keith Busch</name>
<email>keith.busch@intel.com</email>
</author>
<published>2015-10-01T23:14:10Z</published>
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<id>urn:sha1:188c3568f814fea965947ed24739987ba9c5a87e</id>
<content type='text'>
Dynamic namespace attachment means the namespace may be removed at any
time, so the namespace reference count can not be tied to the device
reference count. This fixes a NULL dereference if an opened namespace
is detached from a controller.

Signed-off-by: Keith Busch &lt;keith.busch@intel.com&gt;
Reviewed-by: Christoph Hellwig &lt;hch@lst.de&gt;
Signed-off-by: Jens Axboe &lt;axboe@fb.com&gt;
</content>
</entry>
<entry>
<title>NVMe: Add nvme subsystem reset IOCTL</title>
<updated>2015-08-18T17:56:13Z</updated>
<author>
<name>Jon Derrick</name>
<email>jonathan.derrick@intel.com</email>
</author>
<published>2015-08-10T21:20:41Z</published>
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<id>urn:sha1:81f03fedcce7ee7e83c37237ecaa2f68aad236fd</id>
<content type='text'>
Controllers can perform optional subsystem resets as introduced in NVMe
1.1. This patch adds an IOCTL to trigger the subsystem reset by writing
"NVMe" to the NSSR register.

Signed-off-by: Jon Derrick &lt;jonathan.derrick@intel.com&gt;
Acked-by: Keith Busch &lt;keith.busch@intel.com&gt;
Signed-off-by: Jens Axboe &lt;axboe@fb.com&gt;
</content>
</entry>
<entry>
<title>NVMe: Add nvme subsystem reset support</title>
<updated>2015-08-18T17:56:11Z</updated>
<author>
<name>Keith Busch</name>
<email>keith.busch@intel.com</email>
</author>
<published>2015-08-10T21:20:40Z</published>
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<id>urn:sha1:dfbac8c7ac5f58448b2216fe42ff52aaf175421d</id>
<content type='text'>
Controllers part of an NVMe subsystem may be reset by any other controller
in the subsystem. If the device is capable of subsystem resets, this
patch adds detection for such events and performs appropriate controller
initialization upon subsystem reset detection.

The register bit is a RW1C type, so the driver needs to write a 1 to the
status bit to clear the subsystem reset occured bit during initialization.

Signed-off-by: Keith Busch &lt;keith.busch@intel.com&gt;
Signed-off-by: Jens Axboe &lt;axboe@fb.com&gt;
</content>
</entry>
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