user/sven/linux.git/include/linux/phy, branch v3.19.6

phy: phy-ti-pipe3: fix inconsistent enumeration of PCIe gen2 cards

2014-12-23T10:14:32Z

Prior to DRA74x silicon rev 1.1, pcie_pcs register bits 8-15 and bits 16-23 were used to configure RC delay count for phy1 and phy2 respectively. phyid was used as index to distinguish the phys and to configure the delay values appropriately. As of DRA74x silicon rev 1.1, pcie_pcs register definition has changed. Bits 16-23 are used to configure delay values for *both* phy1 and phy2. Hence phyid is no longer required. So, drop id field from ti_pipe3 structure and its subsequent references for configuring pcie_pcs register. Also, pcie_pcs register now needs to be configured with delay value of 0x96 at bit positions 16-23. See register description of CTRL_CORE_PCIE_PCS in ARM572x TRM, SPRUHZ6, October 2014, section 18.5.2.2, table 18-1804. This is needed to ensure Gen2 cards are enumerated consistently. DRA72x silicon behaves same way as DRA74x rev 1.1 as far as this functionality is considered. Test results on DRA74x and DRA72x EVMs: Before patch ------------ DRA74x ES 1.0: Gen1 cards work, Gen2 cards do not work (expected result due to silicon errata) DRA74x ES 1.1: Gen1 cards work, Gen2 cards do not work sometimes due to incorrect programming of register DRA72x: Gen1 cards work, Gen2 cards do not work sometimes due to incorrect programming of register After patch ----------- DRA74x ES 1.0: Gen1 cards work, Gen2 cards do not work (expected result due to silicon errata) DRA74x ES 1.1: Gen1 cards work, Gen2 cards work consistently. DRA72x: Gen1 and Gen2 cards enumerate consistently. Signed-off-by: Vignesh R Signed-off-by: Kishon Vijay Abraham I

phy: remove the old lookup method

2014-11-22T08:28:39Z

The users of the old method are now converted to the new one. Signed-off-by: Heikki Krogerus [ kishon@ti.com : made phy-berlin-usb.c and phy-miphy28lp.c to use the updated devm_phy_create API.] Signed-off-by: Kishon Vijay Abraham I

phy: improved lookup method

2014-11-21T14:18:50Z

Separates registration of the phy and the lookup. The method is copied from clkdev.c, Signed-off-by: Heikki Krogerus Signed-off-by: Kishon Vijay Abraham I

phy: safer to_phy() macro

2014-11-21T14:18:50Z

This makes to_phy() macro work with other variable names besides "dev". Signed-off-by: Heikki Krogerus Tested-by: Vivek Gautam Acked-by: Felipe Balbi Signed-off-by: Kishon Vijay Abraham I

phy: core: Let node ptr of PHY point to PHY and not of PHY provider

2014-07-22T07:16:11Z

In case of multi-phy PHY providers, each PHY should be modeled as a sub node of the PHY provider. Then each PHY will have a different node pointer (node pointer of sub node) than that of PHY provider. Added this provision in the PHY core. Also fixed all drivers to use the updated API. Signed-off-by: Kishon Vijay Abraham I Acked-by: Lee Jones

phy: core: Support regulator supply for PHY power

2014-07-22T07:16:10Z

Some PHYs can be powered by an external power regulator. e.g. USB_HS PHY on DRA7 SoC. Make the PHY core support a power regulator. Signed-off-by: Roger Quadros Signed-off-by: Kishon Vijay Abraham I

phy: pipe3: insert delay to enumerate in GEN2 mode

2014-07-22T07:16:10Z

8-bit delay value (0xF1) is required for GEN2 devices to be enumerated consistently. Added an API to be called from PHY drivers to set this delay value and called it from PIPE3 driver to set the delay value. Signed-off-by: Kishon Vijay Abraham I Reviewed-by: Roger Quadros

phy: core: make NULL a valid phy reference if !CONFIG_GENERIC_PHY

2014-04-24T19:53:38Z

This fixes a regression on Keystone 2 platforms caused by patch 57303488cd37da58263e842de134dc65f7c626d5 "usb: dwc3: adapt dwc3 core to use Generic PHY Framework" which adds optional support of generic phy in DWC3 core. On Keystone 2 platforms the USB is not working now because CONFIG_GENERIC_PHY isn't set and, as result, Generic PHY APIs stubs return -ENOSYS always. The log shows: dwc3 2690000.dwc3: failed to initialize core dwc3: probe of 2690000.dwc3 failed with error -38 Hence, fix it by making NULL a valid phy reference in Generic PHY APIs stubs in the same way as it was done by the patch 04c2facad8fee66c981a51852806d8923336f362 "drivers: phy: Make NULL a valid phy reference". Acked-by: Felipe Balbi Acked-by: Santosh Shilimkar Signed-off-by: Grygorii Strashko Signed-off-by: Kishon Vijay Abraham I Signed-off-by: Greg Kroah-Hartman

phy: rename struct omap_control_usb to struct omap_control_phy

2014-03-09T07:15:08Z

Rename struct omap_control_usb to struct omap_control_phy since it can be used to control PHY of USB, SATA and PCIE. Also move the driver and include files under *phy* and made the corresponding changes in the users of phy-omap-control. Signed-off-by: Kishon Vijay Abraham I Signed-off-by: Roger Quadros Acked-by: Felipe Balbi

phy: omap-usb2: Provide workaround for USB2PHY false disconnect

2014-03-09T07:15:07Z

Enable the dra7x errata workaround for false disconnect problem with USB2PHY. False disconnects were detected with some of the devices. Reduce the sensitivity of the disconnect logic within the USB2PHY subsystem to enusre these false disconnects are not registered. [george.cherian@ti.com] While at that, pass proper flags for each SoC's. This is a common driver used across OMAP4,OMAP5,DRA7xx and AM437x USB2PHY. False disconnect workaround is currently applicable for only DRA7x. Signed-off-by: Austin Beam Signed-off-by: George Cherian Signed-off-by: Kishon Vijay Abraham I