<feed xmlns='http://www.w3.org/2005/Atom'>
<title>user/sven/linux.git/include/linux/qed, branch v5.3.7</title>
<subtitle>Linux Kernel
</subtitle>
<id>https://git.stealer.net/cgit.cgi/user/sven/linux.git/atom?h=v5.3.7</id>
<link rel='self' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/atom?h=v5.3.7'/>
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<updated>2019-06-18T03:20:36Z</updated>
<entry>
<title>Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net</title>
<updated>2019-06-18T03:20:36Z</updated>
<author>
<name>David S. Miller</name>
<email>davem@davemloft.net</email>
</author>
<published>2019-06-18T02:48:13Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=13091aa30535b719e269f20a7bc34002bf5afae5'/>
<id>urn:sha1:13091aa30535b719e269f20a7bc34002bf5afae5</id>
<content type='text'>
Honestly all the conflicts were simple overlapping changes,
nothing really interesting to report.

Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 440</title>
<updated>2019-06-05T15:37:17Z</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2019-06-01T08:08:54Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=3287e96af0d8b964639f15a6bd1724179db5c2c2'/>
<id>urn:sha1:3287e96af0d8b964639f15a6bd1724179db5c2c2</id>
<content type='text'>
Based on 1 normalized pattern(s):

  this software is available under the terms of the gnu general public
  license gpl version 2 available from the file copying in the main
  directory of this source tree

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-only

has been chosen to replace the boilerplate/reference in 35 file(s).

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Reviewed-by: Allison Randal &lt;allison@lohutok.net&gt;
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190531190115.411886531@linutronix.de
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>qed*: Add iWARP 100g support</title>
<updated>2019-05-26T20:04:12Z</updated>
<author>
<name>Michal Kalderon</name>
<email>michal.kalderon@marvell.com</email>
</author>
<published>2019-05-26T12:22:27Z</published>
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<id>urn:sha1:3576e99e08217f291290ac62431c7e330ac111c4</id>
<content type='text'>
Add iWARP engine affinity setting for supporting iWARP over 100g.
iWARP cannot be distinguished by the LLH from L2, hence the
engine division will affect L2 as well. For this reason we add
a parameter to devlink to determine the engine division.

Signed-off-by: Ariel Elior &lt;ariel.elior@marvell.com&gt;
Signed-off-by: Michal Kalderon &lt;michal.kalderon@marvell.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>qed*: Change hwfn used for sb initialization</title>
<updated>2019-05-26T20:04:11Z</updated>
<author>
<name>Michal Kalderon</name>
<email>michal.kalderon@marvell.com</email>
</author>
<published>2019-05-26T12:22:22Z</published>
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<id>urn:sha1:08eb1fb0f77b0036568d2228f3425f2595d671bb</id>
<content type='text'>
When initializing status blocks use the affined hwfn
instead of the leading one for RDMA / Storage

Signed-off-by: Ariel Elior &lt;ariel.elior@marvell.com&gt;
Signed-off-by: Michal Kalderon &lt;michal.kalderon@marvell.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>drivers: Remove explicit invocations of mmiowb()</title>
<updated>2019-04-08T11:01:02Z</updated>
<author>
<name>Will Deacon</name>
<email>will.deacon@arm.com</email>
</author>
<published>2019-02-22T17:14:59Z</published>
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<id>urn:sha1:fb24ea52f78e0d595852e09e3a55697c8f442189</id>
<content type='text'>
mmiowb() is now implied by spin_unlock() on architectures that require
it, so there is no reason to call it from driver code. This patch was
generated using coccinelle:

	@mmiowb@
	@@
	- mmiowb();

and invoked as:

$ for d in drivers include/linux/qed sound; do \
spatch --include-headers --sp-file mmiowb.cocci --dir $d --in-place; done

NOTE: mmiowb() has only ever guaranteed ordering in conjunction with
spin_unlock(). However, pairing each mmiowb() removal in this patch with
the corresponding call to spin_unlock() is not at all trivial, so there
is a small chance that this change may regress any drivers incorrectly
relying on mmiowb() to order MMIO writes between CPUs using lock-free
synchronisation. If you've ended up bisecting to this commit, you can
reintroduce the mmiowb() calls using wmb() instead, which should restore
the old behaviour on all architectures other than some esoteric ia64
systems.

Acked-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
Signed-off-by: Will Deacon &lt;will.deacon@arm.com&gt;
</content>
</entry>
<entry>
<title>qed: Add API for SmartAN query.</title>
<updated>2019-02-09T06:39:01Z</updated>
<author>
<name>Sudarsana Reddy Kalluru</name>
<email>skalluru@marvell.com</email>
</author>
<published>2019-02-07T14:20:11Z</published>
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<id>urn:sha1:df9c716deb76642d0077770bca7107a31568c113</id>
<content type='text'>
The patch adds driver interface to read the SmartAN capability from
management firmware.

Signed-off-by: Sudarsana Reddy Kalluru &lt;skalluru@marvell.com&gt;
Signed-off-by: Ariel Elior &lt;aelior@marvell.com&gt;
Signed-off-by: Michal Kalderon &lt;mkalderon@marvell.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>qede: Error recovery process</title>
<updated>2019-01-28T18:58:41Z</updated>
<author>
<name>Tomer Tayar</name>
<email>tomer.tayar@cavium.com</email>
</author>
<published>2019-01-28T17:27:56Z</published>
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<id>urn:sha1:ccc67ef50b9085b895738d7720840eb6fe98745e</id>
<content type='text'>
This patch adds the error recovery process in the qede driver.
The process includes a partial/customized driver unload and load, which
allows it to look like a short suspend period to the kernel while
preserving the net devices' state.

Signed-off-by: Tomer Tayar &lt;tomer.tayar@cavium.com&gt;
Signed-off-by: Ariel Elior &lt;ariel.elior@cavium.com&gt;
Signed-off-by: Michal Kalderon &lt;michal.kalderon@cavium.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>qed: Add infrastructure for error detection and recovery</title>
<updated>2019-01-28T18:58:41Z</updated>
<author>
<name>Tomer Tayar</name>
<email>tomer.tayar@cavium.com</email>
</author>
<published>2019-01-28T17:27:55Z</published>
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<id>urn:sha1:64515dc899df898991b2b7e56f69f56f014ea888</id>
<content type='text'>
This patch adds the detection and handling of a parity error ("process kill
event"), including the update of the protocol drivers, and the prevention
of any HW access that will lead to device access towards the host while
recovery is in progress.
It also provides the means for the protocol drivers to trigger a recovery
process on their decision.

Signed-off-by: Tomer Tayar &lt;tomer.tayar@cavium.com&gt;
Signed-off-by: Ariel Elior &lt;ariel.elior@cavium.com&gt;
Signed-off-by: Michal Kalderon &lt;michal.kalderon@cavium.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>qed: remove duplicated include from qed_if.h</title>
<updated>2019-01-18T05:57:45Z</updated>
<author>
<name>YueHaibing</name>
<email>yuehaibing@huawei.com</email>
</author>
<published>2019-01-17T07:22:20Z</published>
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<id>urn:sha1:8b59bfe83cf15f755024e88812e057af7341f525</id>
<content type='text'>
Remove duplicated include.

Signed-off-by: YueHaibing &lt;yuehaibing@huawei.com&gt;
Acked-by: Denis Bolotin &lt;dbolotin@marvell.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>qed: Fix qed_chain_set_prod() for PBL chains with non power of 2 page count</title>
<updated>2019-01-04T20:57:30Z</updated>
<author>
<name>Denis Bolotin</name>
<email>dbolotin@marvell.com</email>
</author>
<published>2019-01-03T10:02:39Z</published>
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<id>urn:sha1:2d533a9287f2011632977e87ce2783f4c689c984</id>
<content type='text'>
In PBL chains with non power of 2 page count, the producer is not at the
beginning of the chain when index is 0 after a wrap. Therefore, after the
producer index wrap around, page index should be calculated more carefully.

Signed-off-by: Denis Bolotin &lt;dbolotin@marvell.com&gt;
Signed-off-by: Ariel Elior &lt;aelior@marvell.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
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