user/sven/linux.git/include/linux/serial_core.h, branch v3.2.65

tty/serial: Add support for Altera serial port

2013-03-20T15:03:33Z

commit e06c93cacb82dd147266fd1bdb2d0a0bd45ff2c1 upstream. Add support for Altera 8250/16550 compatible serial port. Signed-off-by: Ley Foon Tan Signed-off-by: Greg Kroah-Hartman [bwh: Backported to 3.2: adjust filenames, context] Signed-off-by: Ben Hutchings

8250: use correct value for PORT_BRCM_TRUMANAGE

2013-03-06T03:24:25Z

When backporting commit ebebd49a8eab ('8250/16?50: Add support for Broadcom TruManage redirected serial port') I took the next available port type number for PORT_BRCM_TRUMANAGE (22). However, the 8250 port type numbers are exposed to userland through the TIOC{G,S}SERIAL ioctls and so must remain stable. Redefine PORT_BRCM_TRUMANAGE as 25, matching mainline as of commit 85f024401bf807. This leaves port types 22-24 within the valid range for 8250 but not implemented there. Change serial8250_verify_port() to specifically reject these and change serial8250_type() to return "unknown" for them (though I'm not sure why it would ever see them). Signed-off-by: Ben Hutchings

8250/16?50: Add support for Broadcom TruManage redirected serial port

2013-02-06T04:33:36Z

commit ebebd49a8eab5e9aa1b1f8f1614ccc3c2120f886 upstream. Add support for the UART device present in Broadcom TruManage capable NetXtreme chips (ie: 5761m 5762, and 5725). This implementation has a hidden transmit FIFO, so running in single-byte interrupt mode results in too many interrupts. The UART_CAP_HFIFO capability was added to track this. It continues to reload the THR as long as the THRE and TSRE bits are set in the LSR up to a specified limit (1024 is used here). Signed-off-by: Stephen Hurd Signed-off-by: Michael Chan Signed-off-by: Greg Kroah-Hartman [bwh: Backported to 3.2: - Adjust filenames - Adjust context - First available port type number is 22 not 24 - s/uart_8250_port/uart_port/ - Use serial_in() not serial_port_in()] Signed-off-by: Ben Hutchings

serial: Support the EFR-register of XR1715x uarts.

2011-09-22T22:50:38Z

The EFR (Enhenced-Features-Register) is located at a different offset than the other devices supporting UART_CAP_EFR. This change add a special setup quick to set UPF_EXAR_EFR on the port. UPF_EXAR_EFR is then used to the port type to PORT_XR17D15X since it is for sure a XR17D15X uart. Signed-off-by: Søren Holm Acked-by: Alan Cox Signed-off-by: Greg Kroah-Hartman

tty: serial8250: remove UPIO_DWAPB{,32}

2011-08-23T17:53:00Z

Now that platforms can override the port IRQ handler and the only user of these UPIO modes has been converted over, kill off UPIO_DWAPB and UPIO_DWAPB32. Acked-by: Alan Cox Signed-off-by: Jamie Iles Signed-off-by: Greg Kroah-Hartman

tty: serial: allow ports to override the irq handler

2011-08-23T17:52:58Z

Some serial ports may have unusal requirements for interrupt handling (e.g. the Synopsys DesignWare 8250-alike port and it's busy detect interrupt). Add a .handle_irq callback that can be used for platforms to override the interrupt behaviour in a similar fashion to the .serial_out and .serial_in callbacks. Signed-off-by: Jamie Iles Acked-by: Alan Cox Signed-off-by: Greg Kroah-Hartman

TTY: serial, remove tasklet for tty_wakeup

2011-08-23T17:34:06Z

tty_wakeup can be called from any context. So there is no need to have an extra tasklet for calling that. Hence save some space and remove the tasklet completely. Signed-off-by: Jiri Slaby Cc: Alan Cox Signed-off-by: Greg Kroah-Hartman

tty/serial: Add explicit PORT_TEGRA type

2011-05-19T23:51:01Z

Tegra's UART is currently auto-detected as PORT_XSCALE due to register bit UART_IER.UUE being writable. However, the Tegra documentation states that this register bit is reserved. Hence, we should not program it. Instead, the documentation specifies that the UART is 16550 compatible. However, Tegra does need register bit UART_IER.RTOIE set, which is not enabled by any 16550 port type. This was not noticed before, since PORT_XSCALE enables CAP_UUE, which conflates both UUE and RTOIE bit programming. This change defines PORT_TEGRA that doesn't set UART_CAP_UUE, but does set UART_CAP_RTOIE, which is a new capability indicating that the RTOIE bit needs to be enabled. Based-on-code-by: Laxman Dewangan Cc: Laxman Dewangan Signed-off-by: Stephen Warren Acked-by: Alan Cox Signed-off-by: Greg Kroah-Hartman

tty/serial: add support for Xilinx PS UART

2011-05-03T17:26:39Z

The Xilinx PS Uart is used on the new ARM based SoC. This UART is not compatible with others such that a seperate driver is required. Signed-off-by: John Linn Signed-off-by: Greg Kroah-Hartman

pps: unify timestamp gathering

2011-01-13T16:03:19Z

Add a helper function to gather timestamps. This way clients don't have to duplicate it. Signed-off-by: Alexander Gordeev Acked-by: Rodolfo Giometti Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds