user/sven/linux.git/include/linux/sh_clk.h, branch v3.2.31

sh: clkfwk: Kill off remaining debugfs cruft.

2011-11-11T07:11:41Z

Now that all of the named string association with clocks has been migrated to clkdev lookups there's no meaningful named topology that can be constructed for a debugfs tree view. Get rid of the left over bits, and shrink struct clk a bit in the process. Signed-off-by: Paul Mundt

sh: clkfwk: add clk_rate_mult_range_round()

2011-11-04T15:49:27Z

This provides a clk_rate_mult_range_round() helper for use by some of the CPG PLL ranged multipliers, following the same approach as used by the div ranges. Signed-off-by: Kuninori Morimoto Signed-off-by: Paul Mundt

sh: move CLKDEV_xxx_ID macro to sh_clk.h

2011-07-11T06:07:25Z

Signed-off-by: Kuninori Morimoto Signed-off-by: Paul Mundt

sh: clkfwk: Disable init clk op for non-legacy clocks.

2010-11-15T09:48:25Z

Presently it's only legacy users that are using this clock op, guard it with an ifdef to ensure that no new users start using it. Signed-off-by: Paul Mundt

sh: clkfwk: Kill off now unused algo_id in set_rate op.

2010-11-15T09:25:17Z

Now that clk_set_rate_ex() is gone, there is also no way to get at rate setting algo id, which is now also completely unused. Kill it off before new clock ops start using it. Signed-off-by: Paul Mundt

sh: clkfwk: Kill off unused clk_set_rate_ex().

2010-11-15T09:25:12Z

With the refactoring of the SH7722 clock framework some time ago this abstraction has become unecessary. Kill it off before anyone else gets the bright idea to start using it. Signed-off-by: Paul Mundt

sh: add clk_round_parent() to optimize parent clock rate

2010-11-08T00:35:26Z

Sometimes it is possible and reasonable to adjust the parent clock rate to improve precision of the child clock, e.g., if the child clock has no siblings. clk_round_parent() is a new addition to the SH clock-framework API, that implements such an optimization for child clocks with divisors, taking all integer values in a range. Signed-off-by: Guennadi Liakhovetski Signed-off-by: Paul Mundt

sh: clkfwk: Add a helper for rate rounding by divisor ranges.

2010-10-15T09:33:24Z

This adds a new clk_rate_div_range_round() for implementing rate rounding by divisor ranges. This can be used trivially by clocks that support arbitrary ranged divisors without the need for rate table construction. This should only be used by clocks that both have large divisor ranges in addition to clocks that will never be arbitrarily scaled, as the lack of a backing frequency table will prevent cpufreq from being able to do much of anything with them. Primarily intended for use as a ->recalc helper. Signed-off-by: Paul Mundt

sh: clkfwk: Abstract rate rounding helper.

2010-10-15T09:17:35Z

Presently the only assisted rate rounding is frequency table backed, but there are cases where it's impractical to use a frequency table for certain clocks (such as the FSIDIV case, which supports 65535 divisors), and we wish to reuse the same rate rounding algorithm. This breaks out the core of the rate rounding logic in to its own helper routine and shuffles the frequency table logic around, switching to using an iterator for the generic helper routine. Signed-off-by: Paul Mundt

sh: clkfwk: support clock remapping.

2010-10-15T07:46:37Z

This implements support for ioremapping of register windows that encapsulate clock control registers used by a struct clk, with transparent sibling inheritance. Root clocks at the top of a given topology often encapsulate the entire register space of all of their sibling clocks, so this mapping can be done once and handed down. A given clock enable/disable case maps out to a single bit in a shared register, so this prevents creating multiple overlapping mappings. The mapping case breaks down in to a couple of different situations: - Sibling clocks without a specific mapping. - Root clocks without a specific mapping. - Any of sibling/root clocks with a specific mapping. Sibling clocks with no specified mapping will grovel up the clock chain and install the root clock mapping unconditionally at registration time. Root clocks without their own mappings have a dummy BSS-initialized mapping inserted that is handed down the chain just like any other mapping. This permits all of the sibling clock ops to read/write using the mapping offsets without any special configuration, enabling them to not care whether access ultimately goes through translatable or untranslatable memory. Any clock with its own mapping will have the window initialized at registration time and be ready for use by its clock ops. Failure to establish the mapping will prevent registration, so no additional sanity checks are needed. Sibling clocks that double as parents for the moment will not propagate their mapping down, but this is easily tunable if the need arises. All clock mappings are kref refcounted, with each instance of mapping inheritance incrementing the refcount. Tested-by: Kuninori Morimoto Signed-off-by: Paul Mundt