user/sven/linux.git/include/linux/sh_intc.h, branch v3.4.67

sh: intc: remove dependency on NR_IRQS

2012-01-26T02:37:48Z

SH intc has a compile time dependency on NR_IRQS. Make this dependency a local define so that shmobile (and ARM in general) can have run-time NR_IRQS setting. Signed-off-by: Rob Herring

sh: intc: unify evt2irq/irq2evt macros for sh and arm

2012-01-26T02:37:47Z

Move evt2irq and irq2evt macros definitions out of sh and arm includes into a common location. Signed-off-by: Rob Herring

PM / shmobile: Don't include SH7372's INTCS in syscore suspend/resume

2011-12-25T22:39:11Z

Since the SH7372's INTCS in included into syscore suspend/resume, which causes the chip to be accessed when PM domains have been turned off during system suspend, the A4R domain containing the INTCS has to stay on during system sleep, which is suboptimal from the power consumption point of view. For this reason, add a new INTC flag, skip_syscore_suspend, to mark the INTCS for intc_suspend() and intc_resume(), so that they don't touch it. This allows the A4R domain to be turned off during system suspend and the INTCS state is resrored during system resume by the A4R's "power on" code. Suggested-by: Magnus Damm Signed-off-by: Rafael J. Wysocki Acked-by: Magnus Damm

sh: intc: Fix up initializers for gcc 4.5.

2010-11-09T07:38:20Z

The _INTC_ARRAY() initializer presently does a NULL test which blows up as a non-constant initializer under gcc 4.5. This switches over to a type test to account for NULL initializers explicitly. Signed-off-by: Paul Mundt

sh: Switch dynamic IRQ creation to generic irq allocator.

2010-10-26T07:05:08Z

Now that the genirq code provides an IRQ bitmap of its own and the necessary API to manipulate it, there's no need to keep our own version around anymore. In the process we kill off some unused IRQ reservation code, with future users now having to tie in to the genirq API as normal. Signed-off-by: Paul Mundt

sh: intc: Split up the INTC code.

2010-10-05T13:10:30Z

This splits up the sh intc core in to something more vaguely resembling a subsystem. Most of the functionality was alread fairly well compartmentalized, and there were only a handful of interdependencies that needed to be resolved in the process. This also serves as future-proofing for the genirq and sparseirq rework, which will make some of the split out functionality wholly generic, allowing things to be killed off in place with minimal migration pain. Signed-off-by: Paul Mundt

sh: intc: Handle early lookups of subgroup IRQs.

2010-10-05T09:13:23Z

If lookups happen while the radix node still points to a subgroup mapping, an IRQ hasn't yet been made available for the specified id, so error out accordingly. Once the slot is replaced with an IRQ mapping and the tag is discarded, lookup can commence as normal. Signed-off-by: Paul Mundt

sh: intc: Support virtual mappings for IRQ subgroups.

2010-10-04T19:47:03Z

Many interrupts that share a single mask source but are on different hardware vectors will have an associated register tied to an INTEVT that denotes the precise cause for the interrupt exception being triggered. This introduces the concept of IRQ subgroups in the intc core, where a virtual IRQ map is constructed for each of the pre-defined cause bits, and a higher level chained handler takes control of the parent INTEVT. This enables CPUs with heavily muxed IRQ vectors (especially across disjoint blocks) to break things out in to a series of managed chained handlers while being able to dynamically lookup and adopt the IRQs created for them. This is largely an opt-in interface, requiring CPUs to manually submit IRQs for subgroup splitting, in addition to providing identifiers in their enum maps that can be used for lazy lookup via the radix tree. Signed-off-by: Paul Mundt

sh: intc: Implement reverse mapping for IRQs to per-controller IDs.

2010-10-04T16:15:47Z

This implements a scheme roughly analogous to the PowerPC virtual to hardware IRQ mapping, which we use for IRQ to per-controller ID mapping. This makes it possible for drivers to use the IDs directly for lookup instead of hardcoding the vector. The main motivation for this work is as a building block for dynamically allocating virtual IRQs for demuxing INTC events sharing a single INTEVT in addition to a common masking source. Signed-off-by: Paul Mundt

sh: Support early IRQ vector map reservation for delayed controllers.

2010-10-02T13:02:07Z

Some controllers will need to be initialized lazily due to pinmux constraints, while others may simply have no need to be brought online if there are no backing devices for them attached. In this case it's still necessary to be able to reserve their hardware vector map before dynamic IRQs get a hold of them. Signed-off-by: Paul Mundt