<feed xmlns='http://www.w3.org/2005/Atom'>
<title>user/sven/linux.git/include/linux/soc/mediatek, branch v5.8.5</title>
<subtitle>Linux Kernel
</subtitle>
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<updated>2020-04-13T11:01:16Z</updated>
<entry>
<title>soc / drm: mediatek: Move routing control to mmsys device</title>
<updated>2020-04-13T11:01:16Z</updated>
<author>
<name>Enric Balletbo i Serra</name>
<email>enric.balletbo@collabora.com</email>
</author>
<published>2020-03-25T17:31:22Z</published>
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<id>urn:sha1:2c758e301ed95aefde68f98584204811d55c9bb8</id>
<content type='text'>
Provide a mtk_mmsys_ddp_connect() and mtk_mmsys_disconnect() functions to
replace mtk_ddp_add_comp_to_path() and mtk_ddp_remove_comp_from_path().
Those functions will allow DRM driver and others to control the data
path routing.

Signed-off-by: Enric Balletbo i Serra &lt;enric.balletbo@collabora.com&gt;
Reviewed-by: Matthias Brugger &lt;matthias.bgg@gmail.com&gt;
Reviewed-by: CK Hu &lt;ck.hu@mediatek.com&gt;
Acked-by: CK Hu &lt;ck.hu@mediatek.com&gt;
Tested-by: Anders Roxell &lt;anders.roxell@linaro.org&gt;
Reviewed-by: Chun-Kuang Hu &lt;chunkuang.hu@kernel.org&gt;
Signed-off-by: Matthias Brugger &lt;matthias.bgg@gmail.com&gt;
</content>
</entry>
<entry>
<title>Merge tag 'drm-next-2020-01-30' of git://anongit.freedesktop.org/drm/drm</title>
<updated>2020-01-30T16:04:01Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2020-01-30T16:04:01Z</published>
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<id>urn:sha1:9f68e3655aae6d49d6ba05dd263f99f33c2567af</id>
<content type='text'>
Pull drm updates from Davbe Airlie:
 "This is the main pull request for graphics for 5.6. Usual selection of
  changes all over.

  I've got one outstanding vmwgfx pull that touches mm so kept it
  separate until after all of this lands. I'll try and get it to you
  soon after this, but it might be early next week (nothing wrong with
  code, just my schedule is messy)

  This also hits a lot of fbdev drivers with some cleanups.

  Other notables:
   - vulkan timeline semaphore support added to syncobjs
   - nouveau turing secureboot/graphics support
   - Displayport MST display stream compression support

  Detailed summary:

  uapi:
   - dma-buf heaps added (and fixed)
   - command line add support for panel oreientation
   - command line allow overriding penguin count

  drm:
   - mipi dsi definition updates
   - lockdep annotations for dma_resv
   - remove dma-buf kmap/kunmap support
   - constify fb_ops in all fbdev drivers
   - MST fix for daisy chained hotplug-
   - CTA-861-G modes with VIC &gt;= 193 added
   - fix drm_panel_of_backlight export
   - LVDS decoder support
   - more device based logging support
   - scanline alighment for dumb buffers
   - MST DSC helpers

  scheduler:
   - documentation fixes
   - job distribution improvements

  panel:
   - Logic PD type 28 panel support
   - Jimax8729d MIPI-DSI
   - igenic JZ4770
   - generic DSI devicetree bindings
   - sony acx424AKP panel
   - Leadtek LTK500HD1829
   - xinpeng XPP055C272
   - AUO B116XAK01
   - GiantPlus GPM940B0
   - BOE NV140FHM-N49
   - Satoz SAT050AT40H12R2
   - Sharp LS020B1DD01D panels.

  ttm:
   - use blocking WW lock

  i915:
   - hw/uapi state separation
   - Lock annotation improvements
   - selftest improvements
   - ICL/TGL DSI VDSC support
   - VBT parsing improvments
   - Display refactoring
   - DSI updates + fixes
   - HDCP 2.2 for CFL
   - CML PCI ID fixes
   - GLK+ fbc fix
   - PSR fixes
   - GEN/GT refactor improvments
   - DP MST fixes
   - switch context id alloc to xarray
   - workaround updates
   - LMEM debugfs support
   - tiled monitor fixes
   - ICL+ clock gating programming removed
   - DP MST disable sequence fixed
   - LMEM discontiguous object maps
   - prefaulting for discontiguous objects
   - use LMEM for dumb buffers if possible
   - add LMEM mmap support

  amdgpu:
   - enable sync object timelines for vulkan
   - MST atomic routines
   - enable MST DSC support
   - add DMCUB display microengine support
   - DC OEM i2c support
   - Renoir DC fixes
   - Initial HDCP 2.x support
   - BACO support for Arcturus
   - Use BACO for runtime PM power save
   - gfxoff on navi10
   - gfx10 golden updates and fixes
   - DCN support on POWER
   - GFXOFF for raven1 refresh
   - MM engine idle handlers cleanup
   - 10bpc EDP panel fixes
   - renoir watermark fixes
   - SR-IOV fixes
   - Arcturus VCN fixes
   - GDDR6 training fixes
   - freesync fixes
   - Pollock support

  amdkfd:
   - unify more codepath with amdgpu
   - use KIQ to setup HIQ rather than MMIO

  radeon:
   - fix vma fault handler race
   - PPC DMA fix
   - register check fixes for r100/r200

  nouveau:
   - mmap_sem vs dma_resv fix
   - rewrite the ACR secure boot code for Turing
   - TU10x graphics engine support (TU11x pending)
   - Page kind mapping for turing
   - 10-bit LUT support
   - GP10B Tegra fixes
   - HD audio regression fix

  hisilicon/hibmc:
   - use generic fbdev code and helpers

  rockchip:
   - dsi/px30 support

  virtio:
   - fb damage support
   - static some functions

  vc4:
   - use dma_resv lock wrappers

  msm:
   - use dma_resv lock wrappers
   - sc7180 display + DSI support
   - a618 support
   - UBWC support improvements

  vmwgfx:
   - updates + new logging uapi

  exynos:
   - enable/disable callback cleanups

  etnaviv:
   - use dma_resv lock wrappers

  atmel-hlcdc:
   - clock fixes

  mediatek:
   - cmdq support
   - non-smooth cursor fixes
   - ctm property support

  sun4i:
   - suspend support
   - A64 mipi dsi support

  rcar-du:
   - Color management module support
   - LVDS encoder dual-link support
   - R8A77980 support

  analogic:
   - add support for an6345

  ast:
   - atomic modeset support
   - primary plane garbage fix

  arcgpu:
   - fixes for fourcc handling

  tegra:
   - minor fixes and improvments

  mcde:
   - vblank support

  meson:
   - OSD1 plane AFBC commit

  gma500:
   - add pageflip support
   - reomve global drm_dev

  komeda:
   - tweak debugfs output
   - d32 support
   - runtime PM suppotr

  udl:
   - use generic shmem helpers
   - cleanup and fixes"

* tag 'drm-next-2020-01-30' of git://anongit.freedesktop.org/drm/drm: (1998 commits)
  drm/nouveau/fb/gp102-: allow module to load even when scrubber binary is missing
  drm/nouveau/acr: return error when registering LSF if ACR not supported
  drm/nouveau/disp/gv100-: not all channel types support reporting error codes
  drm/nouveau/disp/nv50-: prevent oops when no channel method map provided
  drm/nouveau: support synchronous pushbuf submission
  drm/nouveau: signal pending fences when channel has been killed
  drm/nouveau: reject attempts to submit to dead channels
  drm/nouveau: zero vma pointer even if we only unreference it rather than free
  drm/nouveau: Add HD-audio component notifier support
  drm/nouveau: fix build error without CONFIG_IOMMU_API
  drm/nouveau/kms/nv04: remove set but not used variable 'width'
  drm/nouveau/kms/nv50: remove set but not unused variable 'nv_connector'
  drm/nouveau/mmu: fix comptag memory leak
  drm/nouveau/gr/gp10b: Use gp100_grctx and gp100_gr_zbc
  drm/nouveau/pmu/gm20b,gp10b: Fix Falcon bootstrapping
  drm/exynos: Rename Exynos to lowercase
  drm/exynos: change callback names
  drm/mst: Don't do atomic checks over disabled managers
  drm/amdgpu: add the lost mutex_init back
  drm/amd/display: skip opp blank or unblank if test pattern enabled
  ...
</content>
</entry>
<entry>
<title>soc: mediatek: cmdq: add cmdq_dev_get_client_reg function</title>
<updated>2020-01-08T11:59:57Z</updated>
<author>
<name>Bibby Hsieh</name>
<email>bibby.hsieh@mediatek.com</email>
</author>
<published>2019-11-21T01:54:09Z</published>
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<id>urn:sha1:d412f18c9bc791d8951e903de9a68817e3098a6a</id>
<content type='text'>
GCE cannot know the register base address, this function
can help cmdq client to get the cmdq_client_reg structure.

Signed-off-by: Bibby Hsieh &lt;bibby.hsieh@mediatek.com&gt;
Reviewed-by: CK Hu &lt;ck.hu@mediatek.com&gt;
Reviewed-by: Houlong Wei &lt;houlong.wei@mediatek.com&gt;
Signed-off-by: Matthias Brugger &lt;matthias.bgg@gmail.com&gt;
</content>
</entry>
<entry>
<title>soc: mediatek: cmdq: add polling function</title>
<updated>2020-01-08T11:59:53Z</updated>
<author>
<name>Bibby Hsieh</name>
<email>bibby.hsieh@mediatek.com</email>
</author>
<published>2019-11-21T01:54:08Z</published>
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<id>urn:sha1:b2ff2356bf93d66e7155acea63dcd503aca6c28f</id>
<content type='text'>
add polling function in cmdq helper functions

Signed-off-by: Bibby Hsieh &lt;bibby.hsieh@mediatek.com&gt;
Reviewed-by: CK Hu &lt;ck.hu@mediatek.com&gt;
Signed-off-by: Matthias Brugger &lt;matthias.bgg@gmail.com&gt;
</content>
</entry>
<entry>
<title>scsi: soc: mediatek: add header for SiP service interface</title>
<updated>2020-01-03T02:57:44Z</updated>
<author>
<name>Stanley Chu</name>
<email>stanley.chu@mediatek.com</email>
</author>
<published>2019-12-30T05:32:25Z</published>
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<id>urn:sha1:fef093ff7e9654eec77e79b8170485241f01d027</id>
<content type='text'>
Add a common header for the SiP service interface in MediaTek Chipsets.

Cc: Alim Akhtar &lt;alim.akhtar@samsung.com&gt;
Cc: Avri Altman &lt;avri.altman@wdc.com&gt;
Cc: Bart Van Assche &lt;bvanassche@acm.org&gt;
Cc: Bean Huo &lt;beanhuo@micron.com&gt;
Cc: Can Guo &lt;cang@codeaurora.org&gt;
Cc: Florian Fainelli &lt;f.fainelli@gmail.com&gt;
Cc: Matthias Brugger &lt;matthias.bgg@gmail.com&gt;
Link: https://lore.kernel.org/r/1577683950-1702-2-git-send-email-stanley.chu@mediatek.com
Signed-off-by: Stanley Chu &lt;stanley.chu@mediatek.com&gt;
Signed-off-by: Martin K. Petersen &lt;martin.petersen@oracle.com&gt;
</content>
</entry>
<entry>
<title>Merge tag 'mailbox-v5.4' of git://git.linaro.org/landing-teams/working/fujitsu/integration</title>
<updated>2019-09-19T21:01:47Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2019-09-19T21:01:47Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=b682242f6012dddf81ef94b7ce5d2ec5ac8f8047'/>
<id>urn:sha1:b682242f6012dddf81ef94b7ce5d2ec5ac8f8047</id>
<content type='text'>
Pull mailbox updates from Jassi Brar:

 - qcom:
     - enable support for ipq8074, sm1850 and sm7180
     - add child device node for qcs404
     - misc fixes

 - mediatek:
     - enable support for mt8183
     - misc rejig of cmdq driver
     - new client-reg dt property

 - armada:
     - use device-managed registration api

* tag 'mailbox-v5.4' of git://git.linaro.org/landing-teams/working/fujitsu/integration:
  mailbox: qcom-apcs: fix max_register value
  mailbox: qcom: Add support for IPQ8074 APCS
  dt-bindings: mailbox: qom: Add ipq8074 APPS compatible
  mailbox: qcom: Add support for Qualcomm SM8150 and SC7180 SoCs
  dt-bindings: mailbox: Add APSS shared for SM8150 and SC7180 SoCs
  mbox: qcom: replace integer with valid macro
  mbox: qcom: add APCS child device for QCS404
  mailbox: mediatek: cmdq: clear the event in cmdq initial flow
  mailbox: mediatek: cmdq: support mt8183 gce function
  mailbox: mediatek: cmdq: move the CMDQ_IRQ_MASK into cmdq driver data
  dt-binding: gce: add binding for gce client reg property
  dt-binding: gce: add gce header file for mt8183
  dt-binding: gce: remove thread-num property
  mailbox: armada-37xx-rwtm: Use device-managed registration API
</content>
</entry>
<entry>
<title>mailbox: mediatek: cmdq: clear the event in cmdq initial flow</title>
<updated>2019-09-17T05:40:05Z</updated>
<author>
<name>Bibby Hsieh</name>
<email>bibby.hsieh@mediatek.com</email>
</author>
<published>2019-08-29T01:48:12Z</published>
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<id>urn:sha1:6058f11870b8e6d4f5cc7b591097c00bf69a000d</id>
<content type='text'>
GCE hardware stored event information in own internal sysram,
if the initial value in those sysram is not zero value
it will cause a situation that gce can wait the event immediately
after client ask gce to wait event but not really trigger the
corresponding hardware.

In order to make sure that the wait event function is
exactly correct, we need to clear the sysram value in
cmdq initial flow.

Fixes: 623a6143a845 ("mailbox: mediatek: Add Mediatek CMDQ driver")

Signed-off-by: Bibby Hsieh &lt;bibby.hsieh@mediatek.com&gt;
Reviewed-by: CK Hu &lt;ck.hu@mediatek.com&gt;
Reviewed-by: Matthias Brugger &lt;matthias.bgg@gmail.com&gt;
Signed-off-by: Jassi Brar &lt;jaswinder.singh@linaro.org&gt;
</content>
</entry>
<entry>
<title>soc: mediatek: cmdq: change the type of input parameter</title>
<updated>2019-08-23T12:06:48Z</updated>
<author>
<name>Bibby Hsieh</name>
<email>bibby.hsieh@mediatek.com</email>
</author>
<published>2019-08-20T08:49:28Z</published>
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<id>urn:sha1:556030f0604f3cf5f1ea91307c0695541e5c74ca</id>
<content type='text'>
According to the cmdq hardware design, the subsys is u8,
the offset is u16 and the event id is u16.
This patch changes the type of subsys, offset and event id
to the correct type.

Signed-off-by: Bibby Hsieh &lt;bibby.hsieh@mediatek.com&gt;
Reviewed-by: CK Hu &lt;ck.hu@mediatek.com&gt;
Signed-off-by: Matthias Brugger &lt;matthias.bgg@gmail.com&gt;
</content>
</entry>
<entry>
<title>soc: mediatek: cmdq: reorder the parameter</title>
<updated>2019-08-23T12:03:56Z</updated>
<author>
<name>Bibby Hsieh</name>
<email>bibby.hsieh@mediatek.com</email>
</author>
<published>2019-08-20T08:49:27Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=1a92f989126ef0743650d43f75bfc431a5c3a310'/>
<id>urn:sha1:1a92f989126ef0743650d43f75bfc431a5c3a310</id>
<content type='text'>
The order of gce instructions is [subsys offset value]
so reorder the parameter of cmdq_pkt_write_mask
and cmdq_pkt_write function.

Signed-off-by: Bibby Hsieh &lt;bibby.hsieh@mediatek.com&gt;
Reviewed-by: CK Hu &lt;ck.hu@mediatek.com&gt;
Signed-off-by: Matthias Brugger &lt;matthias.bgg@gmail.com&gt;
</content>
</entry>
<entry>
<title>soc: mediatek: Add Mediatek CMDQ helper</title>
<updated>2018-12-02T19:46:10Z</updated>
<author>
<name>Houlong Wei</name>
<email>houlong.wei@mediatek.com</email>
</author>
<published>2018-11-29T03:37:09Z</published>
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<id>urn:sha1:576f1b4bc80220e1f88f1de5ecb25d99a6e9fa04</id>
<content type='text'>
Add Mediatek CMDQ helper to create CMDQ packet and assemble GCE op code.

Signed-off-by: Houlong Wei &lt;houlong.wei@mediatek.com&gt;
Signed-off-by: HS Liao &lt;hs.liao@mediatek.com&gt;
Signed-off-by: Matthias Brugger &lt;matthias.bgg@gmail.com&gt;
</content>
</entry>
</feed>
