<feed xmlns='http://www.w3.org/2005/Atom'>
<title>user/sven/linux.git/include/linux/soc/qcom, branch v6.17.10</title>
<subtitle>Linux Kernel
</subtitle>
<id>https://git.stealer.net/cgit.cgi/user/sven/linux.git/atom?h=v6.17.10</id>
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<updated>2025-07-31T02:26:49Z</updated>
<entry>
<title>Merge tag 'drm-next-2025-07-30' of https://gitlab.freedesktop.org/drm/kernel</title>
<updated>2025-07-31T02:26:49Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2025-07-31T02:26:49Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=260f6f4fda93c8485c8037865c941b42b9cba5d2'/>
<id>urn:sha1:260f6f4fda93c8485c8037865c941b42b9cba5d2</id>
<content type='text'>
Pull drm updates from Dave Airlie:
 "Highlights:

   - Intel xe enable Panthor Lake, started adding WildCat Lake

   - amdgpu has a bunch of reset improvments along with the usual IP
     updates

   - msm got VM_BIND support which is important for vulkan sparse memory

   - more drm_panic users

   - gpusvm common code to handle a bunch of core SVM work outside
     drivers.

  Detail summary:

  Changes outside drm subdirectory:
   - 'shrink_shmem_memory()' for better shmem/hibernate interaction
   - Rust support infrastructure:
      - make ETIMEDOUT available
      - add size constants up to SZ_2G
      - add DMA coherent allocation bindings
   - mtd driver for Intel GPU non-volatile storage
   - i2c designware quirk for Intel xe

  core:
   - atomic helpers: tune enable/disable sequences
   - add task info to wedge API
   - refactor EDID quirks
   - connector: move HDR sink to drm_display_info
   - fourcc: half-float and 32-bit float formats
   - mode_config: pass format info to simplify

  dma-buf:
   - heaps: Give CMA heap a stable name

  ci:
   - add device tree validation and kunit

  displayport:
   - change AUX DPCD access probe address
   - add quirk for DPCD probe
   - add panel replay definitions
   - backlight control helpers

  fbdev:
   - make CONFIG_FIRMWARE_EDID available on all arches

  fence:
   - fix UAF issues

  format-helper:
   - improve tests

  gpusvm:
   - introduce devmem only flag for allocation
   - add timeslicing support to GPU SVM

  ttm:
   - improve eviction

  sched:
   - tracing improvements
   - kunit improvements
   - memory leak fixes
   - reset handling improvements

  color mgmt:
   - add hardware gamma LUT handling helpers

  bridge:
   - add destroy hook
   - switch to reference counted drm_bridge allocations
   - tc358767: convert to devm_drm_bridge_alloc
   - improve CEC handling

  panel:
   - switch to reference counter drm_panel allocations
   - fwnode panel lookup
   - Huiling hl055fhv028c support
   - Raspberry Pi 7" 720x1280 support
   - edp: KDC KD116N3730A05, N160JCE-ELL CMN, N116BCJ-EAK
   - simple: AUO P238HAN01
   - st7701: Winstar wf40eswaa6mnn0
   - visionox: rm69299-shift
   - Renesas R61307, Renesas R69328 support
   - DJN HX83112B

  hdmi:
   - add CEC handling
   - YUV420 output support

  xe:
   - WildCat Lake support
   - Enable PanthorLake by default
   - mark BMG as SRIOV capable
   - update firmware recommendations
   - Expose media OA units
   - aux-bux support for non-volatile memory
   - MTD intel-dg driver for non-volatile memory
   - Expose fan control and voltage regulator in sysfs
   - restructure migration for multi-device
   - Restore GuC submit UAF fix
   - make GEM shrinker drm managed
   - SRIOV VF Post-migration recovery of GGTT nodes
   - W/A additions/reworks
   - Prefetch support for svm ranges
   - Don't allocate managed BO for each policy change
   - HWMON fixes for BMG
   - Create LRC BO without VM
   - PCI ID updates
   - make SLPC debugfs files optional
   - rework eviction rejection of bound external BOs
   - consolidate PAT programming logic for pre/post Xe2
   - init changes for flicker-free boot
   - Enable GuC Dynamic Inhibit Context switch

  i915:
   - drm_panic support for i915/xe
   - initial flip queue off by default for LNL/PNL
   - Wildcat Lake Display support
   - Support for DSC fractional link bpp
   - Support for simultaneous Panel Replay and Adaptive sync
   - Support for PTL+ double buffer LUT
   - initial PIPEDMC event handling
   - drm_panel_follower support
   - DPLL interface renames
   - allocate struct intel_display dynamically
   - flip queue preperation
   - abstract DRAM detection better
   - avoid GuC scheduling stalls
   - remove DG1 force probe requirement
   - fix MEI interrupt handler on RT kernels
   - use backlight control helpers for eDP
   - more shared display code refactoring

  amdgpu:
   - add userq slot to INFO ioctl
   - SR-IOV hibernation support
   - Suspend improvements
   - Backlight improvements
   - Use scaling for non-native eDP modes
   - cleaner shader updates for GC 9.x
   - Remove fence slab
   - SDMA fw checks for userq support
   - RAS updates
   - DMCUB updates
   - DP tunneling fixes
   - Display idle D3 support
   - Per queue reset improvements
   - initial smartmux support

  amdkfd:
   - enable KFD on loongarch
   - mtype fix for ext coherent system memory

  radeon:
   - CS validation additional GL extensions
   - drop console lock during suspend/resume
   - bump driver version

  msm:
   - VM BIND support
   - CI: infrastructure updates
   - UBWC single source of truth
   - decouple GPU and KMS support
   - DP: rework I/O accessors
   - DPU: SM8750 support
   - DSI: SM8750 support
   - GPU: X1-45 support and speedbin support for X1-85
   - MDSS: SM8750 support

  nova:
   - register! macro improvements
   - DMA object abstraction
   - VBIOS parser + fwsec lookup
   - sysmem flush page support
   - falcon: generic falcon boot code and HAL
   - FWSEC-FRTS: fb setup and load/execute

  ivpu:
   - Add Wildcat Lake support
   - Add turbo flag

  ast:
   - improve hardware generations implementation

  imx:
   - IMX8qxq Display Controller support

  lima:
   - Rockchip RK3528 GPU support

  nouveau:
   - fence handling cleanup

  panfrost:
   - MT8370 support
   - bo labeling
   - 64-bit register access

  qaic:
   - add RAS support

  rockchip:
   - convert inno_hdmi to a bridge

  rz-du:
   - add RZ/V2H(P) support
   - MIPI-DSI DCS support

  sitronix:
   - ST7567 support

  sun4i:
   - add H616 support

  tidss:
   - add TI AM62L support
   - AM65x OLDI bridge support

  bochs:
   - drm panic support

  vkms:
   - YUV and R* format support
   - use faux device

  vmwgfx:
   - fence improvements

  hyperv:
   - move out of simple
   - add drm_panic support"

* tag 'drm-next-2025-07-30' of https://gitlab.freedesktop.org/drm/kernel: (1479 commits)
  drm/tidss: oldi: convert to devm_drm_bridge_alloc() API
  drm/tidss: encoder: convert to devm_drm_bridge_alloc()
  drm/amdgpu: move reset support type checks into the caller
  drm/amdgpu/sdma7: re-emit unprocessed state on ring reset
  drm/amdgpu/sdma6: re-emit unprocessed state on ring reset
  drm/amdgpu/sdma5.2: re-emit unprocessed state on ring reset
  drm/amdgpu/sdma5: re-emit unprocessed state on ring reset
  drm/amdgpu/gfx12: re-emit unprocessed state on ring reset
  drm/amdgpu/gfx11: re-emit unprocessed state on ring reset
  drm/amdgpu/gfx10: re-emit unprocessed state on ring reset
  drm/amdgpu/gfx9.4.3: re-emit unprocessed state on kcq reset
  drm/amdgpu/gfx9: re-emit unprocessed state on kcq reset
  drm/amdgpu: Add WARN_ON to the resource clear function
  drm/amd/pm: Use cached metrics data on SMUv13.0.6
  drm/amd/pm: Use cached data for min/max clocks
  gpu: nova-core: fix bounds check in PmuLookupTableEntry::new
  drm/amdgpu: Replace HQD terminology with slots naming
  drm/amdgpu: Add user queue instance count in HW IP info
  drm/amd/amdgpu: Add helper functions for isp buffers
  drm/amd/amdgpu: Initialize swnode for ISP MFD device
  ...
</content>
</entry>
<entry>
<title>soc: qcom: ubwc: Add #defines for UBWC swizzle bits</title>
<updated>2025-07-05T00:48:40Z</updated>
<author>
<name>Konrad Dybcio</name>
<email>konrad.dybcio@oss.qualcomm.com</email>
</author>
<published>2025-06-26T09:02:39Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=709dd2ff2357734f5a0b2ef68e1f7c4256543a70'/>
<id>urn:sha1:709dd2ff2357734f5a0b2ef68e1f7c4256543a70</id>
<content type='text'>
Make the values a bit more meaningful.

This commit is intentionally cross-subsystem to ease review, as the
patchset is intended to be merged together, with a maintainer
consensus.

Reviewed-by: Dmitry Baryshkov &lt;dmitry.baryshkov@oss.qualcomm.com&gt;
Signed-off-by: Konrad Dybcio &lt;konrad.dybcio@oss.qualcomm.com&gt;
Patchwork: https://patchwork.freedesktop.org/patch/660981/
Signed-off-by: Rob Clark &lt;robin.clark@oss.qualcomm.com&gt;
</content>
</entry>
<entry>
<title>drm/msm/a6xx: Resolve the meaning of UBWC_MODE</title>
<updated>2025-07-05T00:48:40Z</updated>
<author>
<name>Konrad Dybcio</name>
<email>konrad.dybcio@oss.qualcomm.com</email>
</author>
<published>2025-06-26T09:02:34Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=87cfc79dcd605056247c62d65ea41ce6c65cdbe3'/>
<id>urn:sha1:87cfc79dcd605056247c62d65ea41ce6c65cdbe3</id>
<content type='text'>
This bit is set iff the UBWC version is 1.0. That notably does not
include QCM2290's "no UBWC".

This commit is intentionally cross-subsystem to ease review, as the
patchset is intended to be merged together, with a maintainer
consensus.

Reviewed-by: Dmitry Baryshkov &lt;dmitry.baryshkov@oss.qualcomm.com&gt;
Signed-off-by: Konrad Dybcio &lt;konrad.dybcio@oss.qualcomm.com&gt;
Patchwork: https://patchwork.freedesktop.org/patch/660971/
Signed-off-by: Rob Clark &lt;robin.clark@oss.qualcomm.com&gt;
</content>
</entry>
<entry>
<title>drm/msm: Use the central UBWC config database</title>
<updated>2025-07-05T00:48:39Z</updated>
<author>
<name>Konrad Dybcio</name>
<email>konrad.dybcio@oss.qualcomm.com</email>
</author>
<published>2025-06-26T09:02:30Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=45a2974157d2d8b6f26911582d64089cab992d8b'/>
<id>urn:sha1:45a2974157d2d8b6f26911582d64089cab992d8b</id>
<content type='text'>
As discussed a lot in the past, the UBWC config must be coherent across
a number of IP blocks (currently display and GPU, but it also may/will
concern camera/video as the drivers evolve).

So far, we've been trying to keep the values reasonable in each of the
two drivers separately, but it really make sense to do so centrally,
especially given certain fields (e.g. HBB) may need to be gathered
dynamically.

To reduce room for error, move to fetching the config from a central
source, so that the data programmed into the hardware is consistent
across all multimedia blocks that request it.

Reviewed-by: Dmitry Baryshkov &lt;dmitry.baryshkov@oss.qualcomm.com&gt;
Signed-off-by: Konrad Dybcio &lt;konrad.dybcio@oss.qualcomm.com&gt;
Patchwork: https://patchwork.freedesktop.org/patch/660963/
Signed-off-by: Rob Clark &lt;robin.clark@oss.qualcomm.com&gt;
</content>
</entry>
<entry>
<title>soc: qcom: Add UBWC config provider</title>
<updated>2025-07-05T00:48:39Z</updated>
<author>
<name>Konrad Dybcio</name>
<email>konrad.dybcio@oss.qualcomm.com</email>
</author>
<published>2025-06-26T09:02:28Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=1924272b9ce1edc5694e6d112097fd51e821980e'/>
<id>urn:sha1:1924272b9ce1edc5694e6d112097fd51e821980e</id>
<content type='text'>
Add a file that will serve as a single source of truth for UBWC
configuration data for various multimedia blocks.

Reviewed-by: Dmitry Baryshkov &lt;dmitry.baryshkov@oss.qualcomm.com&gt;
Signed-off-by: Konrad Dybcio &lt;konrad.dybcio@oss.qualcomm.com&gt;
Patchwork: https://patchwork.freedesktop.org/patch/660959/
Signed-off-by: Rob Clark &lt;robin.clark@oss.qualcomm.com&gt;
</content>
</entry>
<entry>
<title>soc: qcom: fix endianness for QMI header</title>
<updated>2025-06-17T20:49:10Z</updated>
<author>
<name>Alexander Wilhelm</name>
<email>alexander.wilhelm@westermo.com</email>
</author>
<published>2025-05-22T14:35:30Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=07a4688833b237331e5045f90fc546c085b28c86'/>
<id>urn:sha1:07a4688833b237331e5045f90fc546c085b28c86</id>
<content type='text'>
The members of QMI header have to be swapped on big endian platforms. Use
__le16 types instead of u16 ones.

Signed-off-by: Alexander Wilhelm &lt;alexander.wilhelm@westermo.com&gt;
Fixes: 9b8a11e82615 ("soc: qcom: Introduce QMI encoder/decoder")
Fixes: 3830d0771ef6 ("soc: qcom: Introduce QMI helpers")
Reviewed-by: Dmitry Baryshkov &lt;dmitry.baryshkov@oss.qualcomm.com&gt;
Link: https://lore.kernel.org/r/20250522143530.3623809-3-alexander.wilhelm@westermo.com
Signed-off-by: Bjorn Andersson &lt;andersson@kernel.org&gt;
</content>
</entry>
<entry>
<title>soc: qcom: llcc-qcom: Add support for SM8750</title>
<updated>2025-05-12T21:26:21Z</updated>
<author>
<name>Melody Olvera</name>
<email>melody.olvera@oss.qualcomm.com</email>
</author>
<published>2025-05-12T20:54:43Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=2c04e58e30ce858cc2be531298312c67c7d55fc3'/>
<id>urn:sha1:2c04e58e30ce858cc2be531298312c67c7d55fc3</id>
<content type='text'>
Add system cache table and configs for SM8750 SoCs.

Signed-off-by: Melody Olvera &lt;melody.olvera@oss.qualcomm.com&gt;
Reviewed-by: Konrad Dybcio &lt;konrad.dybcio@oss.qualcomm.com&gt;
Link: https://lore.kernel.org/r/20250512-sm8750_llcc_master-v5-3-d78dca6282a5@oss.qualcomm.com
Signed-off-by: Bjorn Andersson &lt;andersson@kernel.org&gt;
</content>
</entry>
<entry>
<title>Merge tag 'soc-drivers-6.13' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc</title>
<updated>2024-11-20T23:40:54Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2024-11-20T23:40:54Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=14d0e1a09fe97a7524ff36baa695900cb0c10c23'/>
<id>urn:sha1:14d0e1a09fe97a7524ff36baa695900cb0c10c23</id>
<content type='text'>
Pull SoC driver updates from Arnd Bergmann:
 "Nothing particular important in the SoC driver updates, just the usual
  improvements to for drivers/soc and a couple of subsystems that don't
  fit anywhere else:

   - The largest set of updates is for Qualcomm SoC drivers, extending
     the set of supported features for additional SoCs in the QSEECOM,
     LLCC and socinfo drivers.a

   - The ti_sci firmware driver gains support for power managment

   - The drivers/reset subsystem sees a rework of the microchip sparx5
     and amlogic reset drivers to support additional chips, plus a few
     minor updates on other platforms

   - The SCMI firmware interface driver gains support for two protocol
     extensions, allowing more flexible use of the shared memory area
     and new DT binding properties for configurability.

   - Mediatek SoC drivers gain support for power managment on the MT8188
     SoC and a new driver for DVFS.

   - The AMD/Xilinx ZynqMP SoC drivers gain support for system reboot
     and a few bugfixes

   - The Hisilicon Kunpeng HCCS driver gains support for configuring
     lanes through sysfs

  Finally, there are cleanups and minor fixes for drivers/{soc, bus,
  memory}, including changing back the .remove_new callback to .remove,
  as well as a few other updates for freescale (powerpc) soc drivers,
  NXP i.MX soc drivers, cznic turris platform driver, memory controller
  drviers, TI OMAP SoC drivers, and Tegra firmware drivers"

* tag 'soc-drivers-6.13' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (116 commits)
  soc: fsl: cpm1: qmc: Set the ret error code on platform_get_irq() failure
  soc: fsl: rcpm: fix missing of_node_put() in copy_ippdexpcr1_setting()
  soc: fsl: cpm1: tsa: switch to for_each_available_child_of_node_scoped()
  platform: cznic: turris-omnia-mcu: Rename variable holding GPIO line names
  platform: cznic: turris-omnia-mcu: Document the driver private data structure
  firmware: turris-mox-rwtm: Document the driver private data structure
  bus: Switch back to struct platform_driver::remove()
  soc: qcom: ice: Remove the device_link field in qcom_ice
  drm/msm/adreno: Setup SMMU aparture for per-process page table
  firmware: qcom: scm: Introduce CP_SMMU_APERTURE_ID
  firmware: arm_scpi: Check the DVFS OPP count returned by the firmware
  soc: qcom: socinfo: add IPQ5424/IPQ5404 SoC ID
  dt-bindings: arm: qcom,ids: add SoC ID for IPQ5424/IPQ5404
  soc: qcom: llcc: Flip the manual slice configuration condition
  dt-bindings: firmware: qcom,scm: Document sm8750 SCM
  firmware: qcom: uefisecapp: Allow X1E Devkit devices
  misc: lan966x_pci: Fix dtc warn 'Missing interrupt-parent'
  misc: lan966x_pci: Fix dtc warns 'missing or empty reg/ranges property'
  soc: qcom: llcc: Add LLCC configuration for the QCS8300 platform
  dt-bindings: cache: qcom,llcc: Document the QCS8300 LLCC
  ...
</content>
</entry>
<entry>
<title>Merge tag 'qcom-drivers-for-6.13-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/drivers</title>
<updated>2024-11-13T17:38:56Z</updated>
<author>
<name>Arnd Bergmann</name>
<email>arnd@arndb.de</email>
</author>
<published>2024-11-13T17:38:51Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=1876c788bba174660b538dcf5d1bc2b75d7f6d66'/>
<id>urn:sha1:1876c788bba174660b538dcf5d1bc2b75d7f6d66</id>
<content type='text'>
A few more Qualcomm driver updates for v6.13

Make the Adreno driver invoke the SMMU aperture setup firmware function,
which is required to allow the GPU to manage per-process page tables in
some firmware versions - as an example Rb3Gen2 has no GPU without this.

Add X1E Devkit to the list of devices that has functional EFI variable
access through the uefisecapp.

Flip the "manual slice configuration quirk" in the Qualcomm LLCC driver,
as this only applies to a single platform, and introduce support for
QCS8300, QCS615, SAR2130P, and SAR1130P.

Lastly, add IPQ5424 and IPQ5404 to the Qualcomm socinfo driver.

* tag 'qcom-drivers-for-6.13-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
  soc: qcom: ice: Remove the device_link field in qcom_ice
  drm/msm/adreno: Setup SMMU aparture for per-process page table
  firmware: qcom: scm: Introduce CP_SMMU_APERTURE_ID
  soc: qcom: socinfo: add IPQ5424/IPQ5404 SoC ID
  dt-bindings: arm: qcom,ids: add SoC ID for IPQ5424/IPQ5404
  soc: qcom: llcc: Flip the manual slice configuration condition
  dt-bindings: firmware: qcom,scm: Document sm8750 SCM
  firmware: qcom: uefisecapp: Allow X1E Devkit devices
  soc: qcom: llcc: Add LLCC configuration for the QCS8300 platform
  dt-bindings: cache: qcom,llcc: Document the QCS8300 LLCC
  soc: qcom: llcc: Add configuration data for QCS615
  dt-bindings: cache: qcom,llcc: Document the QCS615 LLCC
  soc: qcom: llcc: add support for SAR2130P and SAR1130P
  soc: qcom: llcc: use deciman integers for bit shift values
  dt-bindings: cache: qcom,llcc: document SAR2130P and SAR1130P

Link: https://lore.kernel.org/r/20241113032425.356306-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
</entry>
<entry>
<title>Merge tag 'qcom-drivers-fixes-for-6.12' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/fixes</title>
<updated>2024-11-04T13:23:09Z</updated>
<author>
<name>Arnd Bergmann</name>
<email>arnd@arndb.de</email>
</author>
<published>2024-11-04T13:22:53Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=bbfbb57958635912ba472925622f2bb0bab5f06c'/>
<id>urn:sha1:bbfbb57958635912ba472925622f2bb0bab5f06c</id>
<content type='text'>
Qualcomm driver fixes for v6.12

The Qualcomm EDAC driver's configuration of interrupts is made optional,
to avoid violating security constriants on X Elite platform .

The SCM drivers' detection mechanism for the presence of SHM bridge in QTEE,
is corrected to handle the case where firmware successfully returns that
the interface isn't supported.

The GLINK driver and the PMIC GLINK interface is updated to handle
buffer allocation issues during initialization of the communication
channel.

Allocation error handling in the socinfo dirver is corrected, and then
the fix is corrected.

* tag 'qcom-drivers-fixes-for-6.12' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
  soc: qcom: pmic_glink: Handle GLINK intent allocation rejections
  rpmsg: glink: Handle rejected intent request better
  soc: qcom: socinfo: fix revision check in qcom_socinfo_probe()
  firmware: qcom: scm: Return -EOPNOTSUPP for unsupported SHM bridge enabling
  EDAC/qcom: Make irq configuration optional
  firmware: qcom: scm: fix a NULL-pointer dereference
  firmware: qcom: scm: suppress download mode error
  soc: qcom: Add check devm_kasprintf() returned value
  MAINTAINERS: Qualcomm SoC: Match reserved-memory bindings

Link: https://lore.kernel.org/r/20241101161455.746290-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
</entry>
</feed>
