user/sven/linux.git/include/linux/soc/ti, branch v5.3.2

Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

2019-07-20T00:13:56Z

Pull ARM SoC-related driver updates from Olof Johansson: "Various driver updates for platforms and a couple of the small driver subsystems we merge through our tree: - A driver for SCU (system control) on NXP i.MX8QXP - Qualcomm Always-on Subsystem messaging driver (AOSS QMP) - Qualcomm PM support for MSM8998 - Support for a newer version of DRAM PHY driver for Broadcom (DPFE) - Reset controller support for Bitmain BM1880 - TI SCI (System Control Interface) support for CPU control on AM654 processors - More TI sysc refactoring and rework" * tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (84 commits) reset: remove redundant null check on pointer dev soc: rockchip: work around clang warning dt-bindings: reset: imx7: Fix the spelling of 'indices' soc: imx: Add i.MX8MN SoC driver support soc: aspeed: lpc-ctrl: Fix probe error handling soc: qcom: geni: Add support for ACPI firmware: ti_sci: Fix gcc unused-but-set-variable warning firmware: ti_sci: Use the correct style for SPDX License Identifier soc: imx8: Use existing of_root directly soc: imx8: Fix potential kernel dump in error path firmware/psci: psci_checker: Park kthreads before stopping them memory: move jedec_ddr.h from include/memory to drivers/memory/ memory: move jedec_ddr_data.c from lib/ to drivers/memory/ MAINTAINERS: Remove myself as qcom maintainer soc: aspeed: lpc-ctrl: make parameter optional soc: qcom: apr: Don't use reg for domain id soc: qcom: fix QCOM_AOSS_QMP dependency and build errors memory: tegra: Fix -Wunused-const-variable firmware: tegra: Early resume BPMP soc/tegra: Select pinctrl for Tegra194 ...

firmware: ti_sci: Add support for processor control

2019-06-13T03:13:36Z

Texas Instrument's System Control Interface (TI-SCI) Message Protocol is used in Texas Instrument's System on Chip (SoC) such as those in K3 family AM654 SoC to communicate between various compute processors with a central system controller entity. The system controller provides various services including the control of other compute processors within the SoC. Extend the TI-SCI protocol support to add various TI-SCI commands to invoke services associated with power and reset control, and boot vector management of the various compute processors from the Linux kernel. Signed-off-by: Suman Anna Signed-off-by: Tero Kristo Signed-off-by: Santosh Shilimkar

firmware: ti_sci: Add resource management APIs for ringacc, psi-l and udma

2019-06-13T03:13:35Z

Configuration of NAVSS resource, like rings, UDMAP channels, flows and PSI-L thread management need to be done via TISCI. Add the needed structures and functions for NAVSS resource configuration of the following: Rings from Ring Accelerator PSI-L thread management UDMAP tchan, rchan and rflow configuration. Signed-off-by: Peter Ujfalusi Reviewed-by: Lokesh Vutla Signed-off-by: Tero Kristo Signed-off-by: Santosh Shilimkar

firmware: ti_sci: extend clock identifiers from u8 to u32

2019-06-12T11:45:00Z

Future SoCs are going to have more than 255 device clocks in certain cases, and thus the API must be extended to support this. The support is done in backwards compatible extension, in which the new u32 clock identifier fields are only used if the existing u8 size clock identifier is set as 255. In all the other cases, the existing u8 clock identifier is used. As the size of the messages sent / received is not verified for existing devices / old firmware, increasing the size of the messages from the end is also fine. Due to this reason, depending on ABI version isn't necessary either. Acked-by: Santosh Shilimkar Signed-off-by: Tero Kristo

soc: ti: Add MSI domain bus support for Interrupt Aggregator

2019-05-01T09:49:17Z

With the system coprocessor managing the range allocation of the inputs to Interrupt Aggregator, it is difficult to represent the device IRQs from DT. The suggestion is to use MSI in such cases where devices wants to allocate and group interrupts dynamically. Create a MSI domain bus layer that allocates and frees MSIs for a device. APIs that are implemented: - ti_sci_inta_msi_create_irq_domain() that creates a MSI domain - ti_sci_inta_msi_domain_alloc_irqs() that creates MSIs for the specified device and resource. - ti_sci_inta_msi_domain_free_irqs() frees the irqs attached to the device. - ti_sci_inta_msi_get_virq() for getting the virq attached to a specific event. Signed-off-by: Lokesh Vutla Signed-off-by: Marc Zyngier

firmware: ti_sci: Add helper apis to manage resources

2019-05-01T09:41:33Z

Each resource with in the device can be uniquely identified as defined by TISCI. Since this is generic across the devices, resource allocation also can be made generic instead of each client driver handling the resource. So add helper apis to manage the resource. Signed-off-by: Lokesh Vutla Acked-by: Nishanth Menon Signed-off-by: Marc Zyngier

firmware: ti_sci: Add support for IRQ management

2019-05-01T09:41:02Z

TISCI abstracts the handling of IRQ routes where interrupt sources are not directly connected to host interrupt controller. Add support for the set of TISCI commands for requesting and releasing IRQs. Signed-off-by: Lokesh Vutla Acked-by: Nishanth Menon Signed-off-by: Marc Zyngier

firmware: ti_sci: Add support for RM core ops

2019-05-01T09:40:24Z

TISCI provides support for getting the resources(IRQ, RING etc..) assigned to a specific device. These resources can be handled by the client and in turn sends TISCI cmd to configure the resources. It is very important that client should keep track on usage of these resources. Add support for TISCI commands to get resource ranges. Signed-off-by: Lokesh Vutla Signed-off-by: Peter Ujfalusi Acked-by: Nishanth Menon Signed-off-by: Marc Zyngier

firmware: ti_sci: Add support to get TISCI handle using of_phandle

2019-05-01T09:40:08Z

TISCI has been updated to have support for Resource management(like interrupts etc..). And there can be multiple device instances of a resource type in a SoC. So every driver corresponding to a resource type should get a TISCI handle so that it can make TISCI calls. And each DT node corresponding to a device should exist under its corresponding bus node as per the SoC architecture. But existing apis in TISCI library assumes that all TISCI users are child nodes of TISCI. Which is not true in the above case. So introduce (devm_)ti_sci_get_by_phandle() apis that can be used by TISCI users to get TISCI handle using of phandle property. Signed-off-by: Grygorii Strashko Signed-off-by: Lokesh Vutla Acked-by: Nishanth Menon Signed-off-by: Marc Zyngier

Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

2018-06-12T01:15:22Z

Pull ARM SoC driver updates from Olof Johansson: "This contains platform-related driver updates for ARM and ARM64. Highlights: - ARM SCMI (System Control & Management Interface) driver cleanups - Hisilicon support for LPC bus w/ ACPI - Reset driver updates for several platforms: Uniphier, - Rockchip power domain bindings and hardware descriptions for several SoCs. - Tegra memory controller reset improvements" * tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (59 commits) ARM: tegra: fix compile-testing PCI host driver soc: rockchip: power-domain: add power domain support for px30 dt-bindings: power: add binding for px30 power domains dt-bindings: power: add PX30 SoCs header for power-domain soc: rockchip: power-domain: add power domain support for rk3228 dt-bindings: power: add binding for rk3228 power domains dt-bindings: power: add RK3228 SoCs header for power-domain soc: rockchip: power-domain: add power domain support for rk3128 dt-bindings: power: add binding for rk3128 power domains dt-bindings: power: add RK3128 SoCs header for power-domain soc: rockchip: power-domain: add power domain support for rk3036 dt-bindings: power: add binding for rk3036 power domains dt-bindings: power: add RK3036 SoCs header for power-domain dt-bindings: memory: tegra: Remove Tegra114 SATA and AFI reset definitions memory: tegra: Remove Tegra114 SATA and AFI reset definitions memory: tegra: Register SMMU after MC driver became ready soc: mediatek: remove unneeded semicolon soc: mediatek: add a fixed wait for SRAM stable soc: mediatek: introduce a CAPS flag for scp_domain_data soc: mediatek: reuse regmap_read_poll_timeout helpers ...