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<title>user/sven/linux.git/include/linux/spi, branch v6.2.7</title>
<subtitle>Linux Kernel
</subtitle>
<id>https://git.stealer.net/cgit.cgi/user/sven/linux.git/atom?h=v6.2.7</id>
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<updated>2022-11-04T13:00:06Z</updated>
<entry>
<title>spi: Merge spi_controller.{slave,target}_abort()</title>
<updated>2022-11-04T13:00:06Z</updated>
<author>
<name>Geert Uytterhoeven</name>
<email>geert+renesas@glider.be</email>
</author>
<published>2022-11-04T10:01:27Z</published>
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<id>urn:sha1:6c6871cdaef96361f6b79a3e45d451a6475df4d6</id>
<content type='text'>
Mixing SPI slave/target handlers and SPI slave/target controllers using
legacy and modern naming does not work well: there are now two different
callbacks for aborting a slave/target operation, of which only one is
populated, while spi_{slave,target}_abort() check and use only one,
which may be the unpopulated one.

Fix this by merging the slave/target abort callbacks into a single
callback using a union, like is already done for the slave/target flags.

Fixes: b8d3b056a78dcc94 ("spi: introduce new helpers with using modern naming")
Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Link: https://lore.kernel.org/r/809c82d54b85dd87ef7ee69fc93016085be85cec.1667555967.git.geert+renesas@glider.be
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
</entry>
<entry>
<title>spi: introduce new helpers with using modern naming</title>
<updated>2022-11-01T18:30:10Z</updated>
<author>
<name>Yang Yingliang</name>
<email>yangyingliang@huawei.com</email>
</author>
<published>2022-10-11T09:22:04Z</published>
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<id>urn:sha1:b8d3b056a78dcc941fd1a117697ab2b956c2953f</id>
<content type='text'>
For using modern names host/target to instead of all the legacy names,
I think it takes 3 steps:
  - step1: introduce new helpers with modern naming.
  - step2: switch to use these new helpers in all drivers.
  - step3: remove all legacy helpers and update all legacy names.

This patch is for step1, it introduces new helpers with host/target
naming for drivers using.

Signed-off-by: Yang Yingliang &lt;yangyingliang@huawei.com&gt;
Link: https://lore.kernel.org/r/20221011092204.950288-1-yangyingliang@huawei.com
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
</entry>
<entry>
<title>spi: Introduce spi_get_device_match_data() helper</title>
<updated>2022-10-21T12:05:45Z</updated>
<author>
<name>Andy Shevchenko</name>
<email>andriy.shevchenko@linux.intel.com</email>
</author>
<published>2022-10-20T19:54:21Z</published>
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<id>urn:sha1:aea672d054a21782ed8450c75febb6ba3c208ca4</id>
<content type='text'>
The proposed spi_get_device_match_data() helper is for retrieving
a driver data associated with the ID in an ID table. First, it tries
to get driver data of the device enumerated by firmware interface
(usually Device Tree or ACPI). If none is found it falls back to
the SPI ID table matching.

Signed-off-by: Andy Shevchenko &lt;andriy.shevchenko@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20221020195421.10482-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
</entry>
<entry>
<title>Merge existing fixes from spi/for-6.1 into new branch</title>
<updated>2022-10-17T11:47:33Z</updated>
<author>
<name>Mark Brown</name>
<email>broonie@kernel.org</email>
</author>
<published>2022-10-17T11:47:33Z</published>
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<id>urn:sha1:77cda4b9710fd88769997859eb3b7033bfe37e40</id>
<content type='text'>
</content>
</entry>
<entry>
<title>spi: spi-mem: Fix typo (of -&gt; or)</title>
<updated>2022-10-10T12:01:19Z</updated>
<author>
<name>Jonathan Neuschäfer</name>
<email>j.neuschaefer@gmx.net</email>
</author>
<published>2022-10-08T15:14:59Z</published>
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<id>urn:sha1:b994d8f0773cf3b01129c094d00050710f2c422b</id>
<content type='text'>
In this instance, "or" makes more sense than "of", so I guess that "or"
was intended and "of" was a typo.

Signed-off-by: Jonathan Neuschäfer &lt;j.neuschaefer@gmx.net&gt;
Link: https://lore.kernel.org/r/20221008151459.1421406-1-j.neuschaefer@gmx.net
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
</entry>
<entry>
<title>Merge tag 'spi-v6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi</title>
<updated>2022-10-05T02:36:53Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2022-10-05T02:36:53Z</published>
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<id>urn:sha1:2bca25eaeba6190efbfcb38ed169bd7ee43b5aaf</id>
<content type='text'>
Pull spi updates from Mark Brown:
 "With the exception of some refactoring to fix long standing issues
  where we weren't handling cache syncs properly for messages which had
  PIO and DMA transfers going to the same page correctly there has been
  no work on the core this time around, and it's also been quite a quiet
  release for the drivers too:

   - Fix cache syncs for cases where we have DMA and PIO transfers in
     the same message going to the same page

   - Update the fsl_spi driver to use transfer_one() rather than a
     custom transfer function

   - Support for configuring transfer speeds with the AMD SPI controller

   - Support for a second chip select and 64K erase on Intel SPI

   - Support for Microchip coreQSPI, Nuvoton NPCM845, NXP i.MX93, and
     Rockchip RK3128 and RK3588"

* tag 'spi-v6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: (73 commits)
  spi: Ensure that sg_table won't be used after being freed
  spi: spi-gxp: Use devm_platform_ioremap_resource()
  spi: s3c64xx: Fix large transfers with DMA
  spi: Split transfers larger than max size
  spi: Fix cache corruption due to DMA/PIO overlap
  spi: Save current RX and TX DMA devices
  spi: mt65xx: Add dma max segment size declaration
  spi: migrate mt7621 text bindings to YAML
  spi: renesas,sh-msiof: Add r8a779g0 support
  spi: spi-fsl-qspi: Use devm_platform_ioremap_resource_byname()
  spi: spi-fsl-lpspi: Use devm_platform_get_and_ioremap_resource()
  spi: spi-fsl-dspi: Use devm_platform_get_and_ioremap_resource()
  spi/omap100k:Fix PM disable depth imbalance in omap1_spi100k_probe
  spi: dw: Fix PM disable depth imbalance in dw_spi_bt1_probe
  spi: cadence-quadspi: Fix PM disable depth imbalance in cqspi_probe
  spi: s3c24xx: Switch to use devm_spi_alloc_master()
  spi: xilinx: Switch to use devm_spi_alloc_master()
  spi: img-spfi: using pm_runtime_resume_and_get instead of pm_runtime_get_sync
  spi: aspeed: Remove redundant dev_err call
  spi: spi-mpc52xx: switch to using gpiod API
  ...
</content>
</entry>
<entry>
<title>spi: Save current RX and TX DMA devices</title>
<updated>2022-09-28T11:54:04Z</updated>
<author>
<name>Vincent Whitchurch</name>
<email>vincent.whitchurch@axis.com</email>
</author>
<published>2022-09-27T11:21:14Z</published>
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<id>urn:sha1:f25723dcef4a38f6a39e17afeabd1adf6402230e</id>
<content type='text'>
Save the current RX and TX DMA devices to avoid having to duplicate the
logic to pick them, since we'll need access to them in some more
functions to fix a bug in the cache handling.

Signed-off-by: Vincent Whitchurch &lt;vincent.whitchurch@axis.com&gt;
Link: https://lore.kernel.org/r/20220927112117.77599-2-vincent.whitchurch@axis.com
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
</entry>
<entry>
<title>spi: Group cs_change and cs_off flags together in struct spi_transfer</title>
<updated>2022-09-08T14:25:23Z</updated>
<author>
<name>Andy Shevchenko</name>
<email>andriy.shevchenko@linux.intel.com</email>
</author>
<published>2022-09-08T13:05:18Z</published>
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<id>urn:sha1:86432b7f8f92b784c2e4af5b02766fb44052abf7</id>
<content type='text'>
The commit 5e0531f6b90a ("spi: Add capability to perform some transfer
with chipselect off") added a new flag but squeezed it into a wrong
group of struct spi_transfer members (note that SPI_NBITS_* are macros
for easier interpretation of the tx_nbits and rx_nbits bitfields).

Group cs_change and cs_off flags together and their doc strings.

Signed-off-by: Andy Shevchenko &lt;andriy.shevchenko@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20220908130518.32186-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
</entry>
<entry>
<title>spi: Add capability to perform some transfer with chipselect off</title>
<updated>2022-09-07T14:18:48Z</updated>
<author>
<name>Christophe Leroy</name>
<email>christophe.leroy@csgroup.eu</email>
</author>
<published>2022-09-07T14:11:25Z</published>
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<id>urn:sha1:5e0531f6b90ac096fedaf5bd0eae0bb4e5a39da5</id>
<content type='text'>
Some components require a few clock cycles with chipselect off before
or/and after the data transfer done with CS on.

Typically IDT 801034 QUAD PCM CODEC datasheet states "Note *: CCLK
should have one cycle before CS goes low, and two cycles after
CS goes high".

The cycles "before" are implicitely provided by all previous activity
on the SPI bus. But the cycles "after" must be provided in order to
terminate the SPI transfer.

In order to use that kind of component, add a cs_off flag to
spi_transfer struct. When this flag is set, the transfer is performed
with chipselect off. This allows consummer to add a dummy transfer
at the end of the transfer list which is performed with chipselect
OFF, providing the required additional clock cycles.

Signed-off-by: Christophe Leroy &lt;christophe.leroy@csgroup.eu&gt;
Link: https://lore.kernel.org/r/434165c46f06d802690208a11e7ea2500e8da4c7.1662558898.git.christophe.leroy@csgroup.eu
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
</entry>
<entry>
<title>spi: mux: Fix mux interaction with fast path optimisations</title>
<updated>2022-09-02T12:27:13Z</updated>
<author>
<name>Mark Brown</name>
<email>broonie@kernel.org</email>
</author>
<published>2022-09-01T12:07:32Z</published>
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<id>urn:sha1:b30f7c8eb0780e1479a9882526e838664271f4c9</id>
<content type='text'>
The spi-mux driver is rather too clever and attempts to resubmit any
message that is submitted to it to the parent controller with some
adjusted callbacks.  This does not play at all nicely with the fast
path which now sets flags on the message indicating that it's being
handled through the fast path, we see async messages flagged as being on
the fast path.  Ideally the spi-mux code would duplicate the message but
that's rather invasive and a bit fragile in that it relies on the mux
knowing which fields in the message to copy.  Instead teach the core
that there are controllers which can't cope with the fast path and have
the mux flag itself as being such a controller, ensuring that messages
going via the mux don't get partially handled via the fast path.

This will reduce the performance of any spi-mux connected device since
we'll now always use the thread for both the actual controller and the
mux controller instead of just the actual controller but given that we
were always hitting the slow path anyway it's hopefully not too much of
an additional cost and it allows us to keep the fast path.

Fixes: ae7d2346dc89 ("spi: Don't use the message queue if possible in spi_sync")
Reported-by: Casper Andersson &lt;casper.casan@gmail.com&gt;
Tested-by: Casper Andersson &lt;casper.casan@gmail.com&gt;
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
Link: https://lore.kernel.org/r/20220901120732.49245-1-broonie@kernel.org
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
</entry>
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