<feed xmlns='http://www.w3.org/2005/Atom'>
<title>user/sven/linux.git/include/linux/stmmac.h, branch v5.16.4</title>
<subtitle>Linux Kernel
</subtitle>
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<updated>2022-01-27T11:01:36Z</updated>
<entry>
<title>net: stmmac: Add platform level debug register dump feature</title>
<updated>2022-01-27T11:01:36Z</updated>
<author>
<name>Bhupesh Sharma</name>
<email>bhupesh.sharma@linaro.org</email>
</author>
<published>2021-11-28T19:58:54Z</published>
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<id>urn:sha1:64825bc5e90cde865f9edd4fd59ceede7984a02e</id>
<content type='text'>
[ Upstream commit 4047b9db1aa7512a10ba3560a3f63821c8c40235 ]

dwmac-qcom-ethqos currently exposes a mechanism to dump rgmii registers
after the 'stmmac_dvr_probe()' returns. However with commit
5ec55823438e ("net: stmmac: add clocks management for gmac driver"),
we now let 'pm_runtime_put()' disable the clocks before returning from
'stmmac_dvr_probe()'.

This causes a crash when 'rgmii_dump()' register dumps are enabled,
as the clocks are already off.

Since other dwmac drivers (possible future users as well) might
require a similar register dump feature, introduce a platform level
callback to allow the same.

This fixes the crash noticed while enabling rgmii_dump() dumps in
dwmac-qcom-ethqos driver as well. It also allows future changes
to keep a invoking the register dump callback from the correct
place inside 'stmmac_dvr_probe()'.

Fixes: 5ec55823438e ("net: stmmac: add clocks management for gmac driver")
Cc: Joakim Zhang &lt;qiangqing.zhang@nxp.com&gt;
Cc: David S. Miller &lt;davem@davemloft.net&gt;
Signed-off-by: Bhupesh Sharma &lt;bhupesh.sharma@linaro.org&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>net: stmmac: ptp: update tas basetime after ptp adjust</title>
<updated>2021-07-05T17:16:17Z</updated>
<author>
<name>Xiaoliang Yang</name>
<email>xiaoliang.yang_1@nxp.com</email>
</author>
<published>2021-07-05T10:26:55Z</published>
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<id>urn:sha1:e9e3720002f61cd637a49ecafae77cac230eefae</id>
<content type='text'>
After adjusting the ptp time, the Qbv base time may be the past time
of the new current time. dwmac5 hardware limited the base time cannot
be set as past time. This patch add a btr_reserve to store the base
time get from qopt, then calculate the base time and reset the Qbv
configuration after ptp time adjust.

Signed-off-by: Xiaoliang Yang &lt;xiaoliang.yang_1@nxp.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>net: stmmac: add mutex lock to protect est parameters</title>
<updated>2021-07-05T17:16:17Z</updated>
<author>
<name>Xiaoliang Yang</name>
<email>xiaoliang.yang_1@nxp.com</email>
</author>
<published>2021-07-05T10:26:54Z</published>
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<id>urn:sha1:b2aae654a4794ef898ad33a179f341eb610f6b85</id>
<content type='text'>
Add a mutex lock to protect est structure parameters so that the
EST parameters can be updated by other threads.

Signed-off-by: Xiaoliang Yang &lt;xiaoliang.yang_1@nxp.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>net: stmmac: option to enable PHY WOL with PMT enabled</title>
<updated>2021-06-29T18:34:48Z</updated>
<author>
<name>Ling Pei Lee</name>
<email>pei.lee.ling@intel.com</email>
</author>
<published>2021-06-29T03:08:57Z</published>
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<id>urn:sha1:5a9b876e9d76810536bac70c78d961198612919c</id>
<content type='text'>
The current stmmac driver WOL implementation will enable MAC WOL
if MAC HW PMT feature is on. Else, the driver will check for
PHY WOL support. There is another case where MAC HW PMT is
enabled but the platform still goes for the PHY WOL option.
E.g, Intel platform are designed for PHY WOL but not MAC WOL
although HW MAC PMT features are enabled.

Introduce use_phy_wol platform data to select PHY WOL
instead of depending on HW PMT features. Set use_phy_wol
will disable the plat-&gt;pmt which currently used to
determine the system to wake up by MAC WOL or PHY WOL.

Signed-off-by: Ling Pei Lee &lt;pei.lee.ling@intel.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>net: stmmac: explicitly deassert GMAC_AHB_RESET</title>
<updated>2021-06-08T23:42:12Z</updated>
<author>
<name>Matthew Hagan</name>
<email>mnhagan88@gmail.com</email>
</author>
<published>2021-06-08T18:59:06Z</published>
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<id>urn:sha1:e67f325e9cd67562b761e884680c0fec03a6f404</id>
<content type='text'>
We are currently assuming that GMAC_AHB_RESET will already be deasserted
by the bootloader. However if this has not been done, probing of the GMAC
will fail. To remedy this we must ensure GMAC_AHB_RESET has been deasserted
prior to probing.

v2 changes:
 - remove NULL condition check for stmmac_ahb_rst in stmmac_main.c
 - unwrap dev_err() message in stmmac_main.c
 - add PTR_ERR() around plat-&gt;stmmac_ahb_rst in stmmac_platform.c

v3 changes:
 - add error pointer to dev_err() output
 - add reset_control_assert(stmmac_ahb_rst) in stmmac_dvr_remove
 - revert PTR_ERR() around plat-&gt;stmmac_ahb_rst since this is performed
   on the returned value of ret by the calling function

Signed-off-by: Matthew Hagan &lt;mnhagan88@gmail.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>net: stmmac: enable Intel mGbE 2.5Gbps link speed</title>
<updated>2021-06-08T21:31:43Z</updated>
<author>
<name>Voon Weifeng</name>
<email>weifeng.voon@intel.com</email>
</author>
<published>2021-06-08T03:51:58Z</published>
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<id>urn:sha1:46682cb86a37da435e5668db98555a1de0f0448b</id>
<content type='text'>
The Intel mGbE supports 2.5Gbps link speed by increasing the clock rate by
2.5 times of the original rate. In this mode, the serdes/PHY operates at a
serial baud rate of 3.125 Gbps and the PCS data path and GMII interface of
the MAC operate at 312.5 MHz instead of 125 MHz.

For Intel mGbE, the overclocking of 2.5 times clock rate to support 2.5G is
only able to be configured in the BIOS during boot time. Kernel driver has
no access to modify the clock rate for 1Gbps/2.5G mode. The way to
determined the current 1G/2.5G mode is by reading a dedicated adhoc
register through mdio bus. In short, after the system boot up, it is either
in 1G mode or 2.5G mode which not able to be changed on the fly.

Compared to 1G mode, the 2.5G mode selects the 2500BASEX as PHY interface and
disables the xpcs_an_inband. This is to cater for some PHYs that only
supports 2500BASEX PHY interface with no autonegotiation.

v2: remove MAC supported link speed masking
v3: Restructure  to introduce intel_speed_mode_2500() to read serdes registers
    for max speed supported and select the appropritate configuration.
    Use max_speed to determine the supported link speed mask.

Signed-off-by: Voon Weifeng &lt;weifeng.voon@intel.com&gt;
Signed-off-by: Michael Sit Wei Hong &lt;michael.wei.hong.sit@intel.com&gt;
Reviewed-by: Vladimir Oltean &lt;vladimir.oltean@nxp.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>net: stmmac: enable platform specific safety features</title>
<updated>2021-06-01T23:59:50Z</updated>
<author>
<name>Wong Vee Khee</name>
<email>vee.khee.wong@linux.intel.com</email>
</author>
<published>2021-06-01T13:52:35Z</published>
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<id>urn:sha1:5ac712dcdfefb1a783384db85e0507d161e87812</id>
<content type='text'>
On Intel platforms, not all safety features are enabled on the hardware.
The current implementation enable all safety features by default. This
will cause mass error and warning printouts after the module is loaded.

Introduce platform specific safety features flag to enable or disable
each safety features.

Signed-off-by: Wong Vee Khee &lt;vee.khee.wong@linux.intel.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>net: stmmac: Add callbacks for DWC xpcs Energy Efficient Ethernet</title>
<updated>2021-05-17T22:53:58Z</updated>
<author>
<name>Michael Sit Wei Hong</name>
<email>michael.wei.hong.sit@intel.com</email>
</author>
<published>2021-05-17T09:43:32Z</published>
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<id>urn:sha1:e80fe71b3ffe1ec31c4a9be60170f897bbdf1b92</id>
<content type='text'>
Link xpcs callback functions for MAC to configure the xpcs EEE feature.

The clk_eee frequency is used to calculate the MULT_FACT_100NS. This is
to adjust the clock tic closer to 100ns.

Signed-off-by: Michael Sit Wei Hong &lt;michael.wei.hong.sit@intel.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>net: stmmac: Add HW descriptor prefetch setting for DWMAC Core 5.20 onwards</title>
<updated>2021-04-22T22:02:40Z</updated>
<author>
<name>Mohammad Athari Bin Ismail</name>
<email>mohammad.athari.ismail@intel.com</email>
</author>
<published>2021-04-22T07:55:00Z</published>
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<id>urn:sha1:96874c619c200bc704ae2d8e34a3746350922135</id>
<content type='text'>
DWMAC Core 5.20 onwards supports HW descriptor prefetching.
Additionally, it also depends on platform specific RTL configuration.
This capability could be enabled by setting DMA_Mode bit-19 (DCHE).

So, to enable this cability, platform must set plat-&gt;dma_cfg-&gt;dche = true
and the DWMAC core version must be 5.20 onwards. Else, this capability
wouldn`t be configured

Signed-off-by: Mohammad Athari Bin Ismail &lt;mohammad.athari.ismail@intel.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>net: stmmac: Add support for external trigger timestamping</title>
<updated>2021-04-14T19:57:45Z</updated>
<author>
<name>Tan Tee Min</name>
<email>tee.min.tan@intel.com</email>
</author>
<published>2021-04-14T00:16:17Z</published>
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<id>urn:sha1:f4da56529da602010979e8497d1f02eaf5df8883</id>
<content type='text'>
The Synopsis MAC controller supports auxiliary snapshot feature that
allows user to store a snapshot of the system time based on an external
event.

This patch add supports to the above mentioned feature. Users will be
able to triggered capturing the time snapshot from user-space using
application such as testptp or any other applications that uses the
PTP_EXTTS_REQUEST ioctl request.

Cc: Richard Cochran &lt;richardcochran@gmail.com&gt;
Signed-off-by: Tan Tee Min &lt;tee.min.tan@intel.com&gt;
Co-developed-by: Wong Vee Khee &lt;vee.khee.wong@linux.intel.com&gt;
Signed-off-by: Wong Vee Khee &lt;vee.khee.wong@linux.intel.com&gt;
Acked-by: Richard Cochran &lt;richardcochran@gmail.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
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