<feed xmlns='http://www.w3.org/2005/Atom'>
<title>user/sven/linux.git/include/uapi/drm/amdgpu_drm.h, branch stable/6.9.y</title>
<subtitle>Linux Kernel
</subtitle>
<id>https://git.stealer.net/cgit.cgi/user/sven/linux.git/atom?h=stable%2F6.9.y</id>
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<updated>2024-01-15T23:35:36Z</updated>
<entry>
<title>drm/amdgpu: add new INFO IOCTL query for input power</title>
<updated>2024-01-15T23:35:36Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2023-10-02T18:33:15Z</published>
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<id>urn:sha1:d3f452f3a01e748cc6e569df6275e95b0efdb01f</id>
<content type='text'>
Some chips provide both average and input power.  Previously
we just exposed average power, add a new query for input
power.

Example userspace:
https://github.com/Umio-Yasuno/libdrm-amdgpu-sys-rs/tree/input_power

Reviewed-by: Yang Wang &lt;kevinyang.wang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: amdgpu_drm.h: fix comment typos</title>
<updated>2023-10-05T21:49:55Z</updated>
<author>
<name>Randy Dunlap</name>
<email>rdunlap@infradead.org</email>
</author>
<published>2023-10-02T01:08:33Z</published>
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<id>urn:sha1:0029e4d46b8958c2b2cd249f9fd820954713463e</id>
<content type='text'>
Correct typos of "occurred".

Signed-off-by: Randy Dunlap &lt;rdunlap@infradead.org&gt;
Cc: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: Christian König &lt;christian.koenig@amd.com&gt;
Cc: "Pan, Xinhui" &lt;Xinhui.Pan@amd.com&gt;
Cc: amd-gfx@lists.freedesktop.org
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add new INFO ioctl query for the last GPU page fault</title>
<updated>2023-10-05T21:49:39Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2020-10-06T20:54:35Z</published>
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<id>urn:sha1:7a41ed8b59ba74ae36adc7f4688feff9e710cf76</id>
<content type='text'>
Add a interface to query the last GPU page fault for the process.
Useful for debugging context lost errors.

v2: split vmhub representation between kernel and userspace
v3: add locking when fetching fault info in INFO IOCTL

Mesa MR: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23238
libdrm MR: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23238

Cc: samuel.pitoiset@gmail.com
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Acked-by: Guchun Chen &lt;guchun.chen@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Add EXT_COHERENT memory allocation flags</title>
<updated>2023-09-20T20:24:06Z</updated>
<author>
<name>David Francis</name>
<email>David.Francis@amd.com</email>
</author>
<published>2023-07-21T15:14:24Z</published>
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<id>urn:sha1:5f248462c69d5ea7b54a88c62edb73f626d1528d</id>
<content type='text'>
These flags (for GEM and SVM allocations) allocate
memory that allows for system-scope atomic semantics.

On GFX943 these flags cause caches to be avoided on
non-local memory.

On all other ASICs they are identical in functionality to the
equivalent COHERENT flags.

Corresponding Thunk patch is at
https://github.com/RadeonOpenCompute/ROCT-Thunk-Interface/pull/88

Reviewed-by: David Yat Sin &lt;David.YatSin@amd.com&gt;
Signed-off-by: David Francis &lt;David.Francis@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add VPE FW version query support</title>
<updated>2023-08-31T20:34:19Z</updated>
<author>
<name>Lang Yu</name>
<email>Lang.Yu@amd.com</email>
</author>
<published>2023-05-31T04:19:54Z</published>
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<id>urn:sha1:5f6e9cdc83c146c6c20b36a2fb6dd607ed9e009a</id>
<content type='text'>
Add support to query VPE FW version.

Signed-off-by: Lang Yu &lt;Lang.Yu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add VPE HW IP definition</title>
<updated>2023-08-30T19:51:17Z</updated>
<author>
<name>Huang Rui</name>
<email>ray.huang@amd.com</email>
</author>
<published>2022-04-23T14:13:06Z</published>
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<id>urn:sha1:f65239008a1f5f9b72de6e7259dfd1b7af45a8af</id>
<content type='text'>
Add HW IP for Video Processing Engine
to support user space CS.

Signed-off-by: Huang Rui &lt;ray.huang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add new AMDGPU_FAMILY definition</title>
<updated>2023-08-30T19:00:15Z</updated>
<author>
<name>Prike Liang</name>
<email>Prike.Liang@amd.com</email>
</author>
<published>2023-07-14T19:53:40Z</published>
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<id>urn:sha1:2c8a7ca164171d8e9895a0f84da660559e8e414e</id>
<content type='text'>
add GC 11.5.0 family

Signed-off-by: Prike Liang &lt;Prike.Liang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add UAPI for allocating doorbell memory</title>
<updated>2023-08-07T21:14:06Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2022-09-20T17:03:36Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=899272354dbc1f8ca2d94ea0ddc0174a14fc8324'/>
<id>urn:sha1:899272354dbc1f8ca2d94ea0ddc0174a14fc8324</id>
<content type='text'>
This patch adds flags for a new gem domain AMDGPU_GEM_DOMAIN_DOORBELL
in the UAPI layer.

V2: Drop 'memory' from description (Christian)

Cc: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: Christian Koenig &lt;christian.koenig@amd.com&gt;
Reviewed-by: Christian Koenig &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Shashank Sharma &lt;shashank.sharma@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add new flag to AMDGPU_CTX_QUERY2</title>
<updated>2023-06-09T13:20:55Z</updated>
<author>
<name>Pierre-Eric Pelloux-Prayer</name>
<email>pierre-eric.pelloux-prayer@amd.com</email>
</author>
<published>2023-04-24T17:25:32Z</published>
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<id>urn:sha1:489763af891d5dc35c0b64e18af284d6591286cf</id>
<content type='text'>
OpenGL EXT_robustness extension expects the driver to stop reporting
GUILTY_CONTEXT_RESET when the reset has completed and the GPU is ready
to accept submission again.

This commit adds a AMDGPU_CTX_QUERY2_FLAGS_RESET_IN_PROGRESS flag,
that let the UMD know that the reset is still not finished.

Mesa MR: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22290

Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: André Almeida &lt;andrealmeid@igalia.com&gt;
Signed-off-by: Pierre-Eric Pelloux-Prayer &lt;pierre-eric.pelloux-prayer@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add UAPI to query GFX shadow sizes</title>
<updated>2023-04-24T22:16:30Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2023-03-09T18:43:13Z</published>
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<id>urn:sha1:edd9038000352ba846cba9dfb84d8c397c3b6499</id>
<content type='text'>
Add UAPI to query the GFX shadow buffer requirements
for preemption on GFX11.  UMDs need to specify the shadow
areas for preemption.

v2: move into existing asic info query
    drop GDS as its use is determined by the UMD (Marek)
v3: Update comments to note that alignment is base
    virtual alignment (Alex)

Reviewed-by: Marek Olšák &lt;marek.olsak@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
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