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<title>user/sven/linux.git/include/uapi/drm/amdgpu_drm.h, branch v4.19.85</title>
<subtitle>Linux Kernel
</subtitle>
<id>https://git.stealer.net/cgit.cgi/user/sven/linux.git/atom?h=v4.19.85</id>
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<updated>2018-07-16T20:29:47Z</updated>
<entry>
<title>drm/amdgpu: Allow to create BO lists in CS ioctl v3</title>
<updated>2018-07-16T20:29:47Z</updated>
<author>
<name>Andrey Grodzovsky</name>
<email>andrey.grodzovsky@amd.com</email>
</author>
<published>2018-07-06T18:16:54Z</published>
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<id>urn:sha1:964d0fbf6301d3dc8dfad19ffab5a06d002d27f1</id>
<content type='text'>
This change is to support MESA performace optimization.
Modify CS IOCTL to allow its input as command buffer and an array of
buffer handles to create a temporay bo list and then destroy it
when IOCTL completes.
This saves on calling for BO_LIST create and destry IOCTLs in MESA
and by this improves performance.

v2: Avoid inserting the temp list into idr struct.

v3:
Remove idr alloation from amdgpu_bo_list_create.
Remove useless argument from amdgpu_cs_parser_fini
Minor cosmetic stuff.

v4: Revert amdgpu_bo_list_destroy back to static

Signed-off-by: Andrey Grodzovsky &lt;andrey.grodzovsky@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Chunming Zhou &lt;david1.zhou@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>uapi/drm: add AMDGPU_HW_IP_VCN_JPEG for jpeg CS</title>
<updated>2018-06-15T17:20:39Z</updated>
<author>
<name>Boyuan Zhang</name>
<email>boyuan.zhang@amd.com</email>
</author>
<published>2018-05-01T18:47:31Z</published>
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<id>urn:sha1:81d350144bd4590ae546d83344421106e8faf69a</id>
<content type='text'>
Add AMDGPU_HW_IP_VCN_JPEG define for jpeg CS

Signed-off-by: Boyuan Zhang &lt;boyuan.zhang@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add kernel doc for memory domains.</title>
<updated>2018-06-15T17:20:29Z</updated>
<author>
<name>Samuel Li</name>
<email>Samuel.Li@amd.com</email>
</author>
<published>2018-05-24T18:32:49Z</published>
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<id>urn:sha1:b646c1dc835b6b73884a88643c2534f1a4a1928f</id>
<content type='text'>
Document the GEM domains exposed to userspace.

Suggested-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Samuel Li &lt;Samuel.Li@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Add support to change mtype for 2nd part of gart BOs on GFX9</title>
<updated>2018-05-15T18:44:26Z</updated>
<author>
<name>Yong Zhao</name>
<email>yong.zhao@amd.com</email>
</author>
<published>2018-05-14T16:15:27Z</published>
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<id>urn:sha1:959a2091fae0fa498c79e095a4f6cbbb202a1194</id>
<content type='text'>
This change prepares for a workaround in amdkfd for a GFX9 HW bug. It
requires the control stack memory of compute queues, which is allocated
from the second page of MQD gart BOs, to have mtype NC, rather than
the default UC.

Signed-off-by: Yong Zhao &lt;yong.zhao@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add save restore list cntl gpm and srm firmware support</title>
<updated>2018-05-15T18:43:36Z</updated>
<author>
<name>Huang Rui</name>
<email>ray.huang@amd.com</email>
</author>
<published>2018-01-22T12:48:14Z</published>
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<id>urn:sha1:621a6318adea69b08a3652c64bc7cc0cb4dacfb4</id>
<content type='text'>
RLC save/restore list cntl/gpm_mem/srm_mem ucodes are used for CGPG and gfxoff
function.

Signed-off-by: Huang Rui &lt;ray.huang@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: optionally do a writeback but don't invalidate TC for IB fences</title>
<updated>2018-05-15T18:43:32Z</updated>
<author>
<name>Marek Olšák</name>
<email>marek.olsak@amd.com</email>
</author>
<published>2018-04-03T17:05:03Z</published>
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<id>urn:sha1:d240cd9eddd943dbe0267d081697195ff1e90b65</id>
<content type='text'>
There is a new IB flag that enables this new behavior.
Full invalidation is unnecessary for RELEASE_MEM and doesn't make sense
when draw calls from two adjacent gfx IBs run in parallel. This will be
the new default for Mesa.

v2: bump the version

Signed-off-by: Marek Olšák &lt;marek.olsak@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: handle domain mask checking v2</title>
<updated>2018-05-15T18:43:32Z</updated>
<author>
<name>Chunming Zhou</name>
<email>david1.zhou@amd.com</email>
</author>
<published>2018-04-17T10:34:40Z</published>
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<id>urn:sha1:3f188453faf7ba5b59e8064df4afffbc946e25ec</id>
<content type='text'>
if domain is illegal, we should return error.
v2:
  remove duplicated domain checking.

Signed-off-by: Chunming Zhou &lt;david1.zhou@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: revert "add new bo flag that indicates BOs don't need fallback (v2)"</title>
<updated>2018-05-15T18:43:19Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2018-04-10T11:42:29Z</published>
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<id>urn:sha1:1afd30efeddbb1b32cf35d3bf6477b35690eeca6</id>
<content type='text'>
This reverts commit 6f51d28bfe8e1a676de5cd877639245bed3cc818.

Makes fallback handling to complicated. This is just a feature for the
GEM interface and shouldn't leak into the core BO create function.

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Acked-by: Chunming Zhou &lt;david1.zhou@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add new bo flag that indicates BOs don't need fallback (v2)</title>
<updated>2018-04-11T18:08:01Z</updated>
<author>
<name>Chunming Zhou</name>
<email>david1.zhou@amd.com</email>
</author>
<published>2018-04-02T03:20:44Z</published>
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<id>urn:sha1:552825b28ddac200b6080d9e79f4121b68e1517d</id>
<content type='text'>
user cases:
1. KFD wraps amdgpu_bo_create, they have no fallback case which is different
with amdgpu_gem_object_create.
since upstream branch has no amdgpu_amdkfd_gpuvm.c, which need KFD
guys add this flag to __alloc_memory_of_gpu:
+       flags |= AMDGPU_GEM_CREATE_NO_FALLBACK;
2. UMD can specify this flag for their allocation as well if they like.

v2: squash in merge conflict fix (Chunming)

Signed-off-by: Chunming Zhou &lt;david1.zhou@amd.com&gt;
Acked-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Cc: felix.kuehling@amd.com
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add VCN to firmware query interface</title>
<updated>2018-03-21T04:42:49Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2018-03-16T16:04:53Z</published>
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<id>urn:sha1:3ac952b10dec55e50312340ca4cf8f631944ae17</id>
<content type='text'>
Need to be able to query the VCN firmware version from
userspace to determine supported features, etc.

Reviewed-by: Huang Rui &lt;ray.huang@amd.com&gt;
Acked-by: Leo Liu &lt;leo.liu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
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