user/sven/linux.git/include/uapi/drm/amdgpu_drm.h, branch v5.0.16

drm/amdgpu: Add DCC flags for GFX9 amdgpu_bo

2018-11-05T19:21:12Z

[Why] Hardware support for Delta Color Compression (DCC) decompression is available in DC for GFX9 but there's no way for userspace to enable the feature. Enabling the feature can provide improved GFX performance and power savings in many situations. [How] Extend the GFX9 tiling flags to include DCC parameters. These are logically grouped together with tiling flags even if they are technically distinct. This trivially maintains backwards compatibility with existing users of amdgpu_gem_metadata. No new IOCTls or data structures are needed to support DCC. This patch helps expose DCC attributes to both libdrm and amdgpu_dm. Signed-off-by: Nicholas Kazlauskas Reviewed-by: Marek Olšák Signed-off-by: Alex Deucher

drm/amdgpu: Add DMCU to firmware query interface

2018-09-14T14:37:43Z

DMCU firmware version can be read using the AMDGPU_INFO ioctl or the amdgpu_firmware_info debugfs entry Signed-off-by: David Francis Reviewed-by: Huang Rui Signed-off-by: Alex Deucher

drm/amdgpu: Allow to create BO lists in CS ioctl v3

2018-07-16T20:29:47Z

This change is to support MESA performace optimization. Modify CS IOCTL to allow its input as command buffer and an array of buffer handles to create a temporay bo list and then destroy it when IOCTL completes. This saves on calling for BO_LIST create and destry IOCTLs in MESA and by this improves performance. v2: Avoid inserting the temp list into idr struct. v3: Remove idr alloation from amdgpu_bo_list_create. Remove useless argument from amdgpu_cs_parser_fini Minor cosmetic stuff. v4: Revert amdgpu_bo_list_destroy back to static Signed-off-by: Andrey Grodzovsky Reviewed-by: Christian König Reviewed-by: Chunming Zhou Signed-off-by: Alex Deucher

uapi/drm: add AMDGPU_HW_IP_VCN_JPEG for jpeg CS

2018-06-15T17:20:39Z

Add AMDGPU_HW_IP_VCN_JPEG define for jpeg CS Signed-off-by: Boyuan Zhang Reviewed-by: Christian König Signed-off-by: Alex Deucher

drm/amdgpu: add kernel doc for memory domains.

2018-06-15T17:20:29Z

Document the GEM domains exposed to userspace. Suggested-by: Alex Deucher Signed-off-by: Samuel Li Reviewed-by: Christian König Signed-off-by: Alex Deucher

drm/amdgpu: Add support to change mtype for 2nd part of gart BOs on GFX9

2018-05-15T18:44:26Z

This change prepares for a workaround in amdkfd for a GFX9 HW bug. It requires the control stack memory of compute queues, which is allocated from the second page of MQD gart BOs, to have mtype NC, rather than the default UC. Signed-off-by: Yong Zhao Reviewed-by: Christian König Signed-off-by: Alex Deucher

drm/amdgpu: add save restore list cntl gpm and srm firmware support

2018-05-15T18:43:36Z

RLC save/restore list cntl/gpm_mem/srm_mem ucodes are used for CGPG and gfxoff function. Signed-off-by: Huang Rui Acked-by: Alex Deucher Acked-by: Christian König Signed-off-by: Alex Deucher

drm/amdgpu: optionally do a writeback but don't invalidate TC for IB fences

2018-05-15T18:43:32Z

There is a new IB flag that enables this new behavior. Full invalidation is unnecessary for RELEASE_MEM and doesn't make sense when draw calls from two adjacent gfx IBs run in parallel. This will be the new default for Mesa. v2: bump the version Signed-off-by: Marek Olšák Reviewed-by: Christian König Signed-off-by: Alex Deucher

drm/amdgpu: handle domain mask checking v2

2018-05-15T18:43:32Z

if domain is illegal, we should return error. v2: remove duplicated domain checking. Signed-off-by: Chunming Zhou Reviewed-by: Christian König Signed-off-by: Alex Deucher

drm/amdgpu: revert "add new bo flag that indicates BOs don't need fallback (v2)"

2018-05-15T18:43:19Z

This reverts commit 6f51d28bfe8e1a676de5cd877639245bed3cc818. Makes fallback handling to complicated. This is just a feature for the GEM interface and shouldn't leak into the core BO create function. Signed-off-by: Christian König Acked-by: Chunming Zhou Signed-off-by: Alex Deucher