user/sven/linux.git/include/uapi/linux/elf.h, branch v5.8.8

arm64: elf: Enable BTI at exec based on ELF program properties

2020-03-16T17:19:48Z

For BTI protection to be as comprehensive as possible, it is desirable to have BTI enabled from process startup. If this is not done, the process must use mprotect() to enable BTI for each of its executable mappings, but this is painful to do in the libc startup code. It's simpler and more sound to have the kernel do it instead. To this end, detect BTI support in the executable (or ELF interpreter, as appropriate), via the NT_GNU_PROGRAM_PROPERTY_TYPE_0 note, and tweak the initial prot flags for the process' executable pages to include PROT_BTI as appropriate. Signed-off-by: Mark Brown Signed-off-by: Dave Martin Reviewed-by: Kees Cook Signed-off-by: Catalin Marinas

ELF: Add ELF program property parsing support

2020-03-16T17:19:48Z

ELF program properties will be needed for detecting whether to enable optional architecture or ABI features for a new ELF process. For now, there are no generic properties that we care about, so do nothing unless CONFIG_ARCH_USE_GNU_PROPERTY=y. Otherwise, the presence of properties using the PT_PROGRAM_PROPERTY phdrs entry (if any), and notify each property to the arch code. For now, the added code is not used. Signed-off-by: Mark Brown Signed-off-by: Dave Martin Reviewed-by: Kees Cook Signed-off-by: Catalin Marinas

ELF: UAPI and Kconfig additions for ELF program properties

2020-03-16T17:19:48Z

Pull the basic ELF definitions relating to the NT_GNU_PROPERTY_TYPE_0 note from Yu-Cheng Yu's earlier x86 shstk series. Signed-off-by: Mark Brown Signed-off-by: Dave Martin Signed-off-by: Yu-cheng Yu Reviewed-by: Catalin Marinas Reviewed-by: Kees Cook Signed-off-by: Catalin Marinas

arm64: add ptrace regsets for ptrauth key management

2019-02-01T13:56:58Z

Add two new ptrace regsets, which can be used to request and change the pointer authentication keys of a thread. NT_ARM_PACA_KEYS gives access to the instruction/data address keys, and NT_ARM_PACG_KEYS to the generic authentication key. The keys are also part of the core dump file of the process. The regsets are only exposed if the kernel is compiled with CONFIG_CHECKPOINT_RESTORE=y, as the only intended use case is checkpointing and restoring processes that are using pointer authentication. (This can be changed later if there are other use cases.) Reviewed-by: Dave Martin Signed-off-by: Kristina Martsenko Signed-off-by: Catalin Marinas

Merge tag 'mips_4.21' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux

2018-12-26T18:45:33Z

Pull MIPS updates from Paul Burton: "Here's the main MIPS pull for Linux 4.21. Core architecture changes include: - Syscall tables & definitions for unistd.h are now generated by scripts, providing greater consistency with other architectures & making it easier to add new syscalls. - Support for building kernels with no floating point support, upon which any userland attempting to use floating point instructions will receive a SIGILL. Mostly useful to shrink the kernel & as preparation for nanoMIPS support which does not yet include FP. - MIPS SIMD Architecture (MSA) vector register context is now exposed by ptrace via a new NT_MIPS_MSA regset. - ASIDs are now stored as 64b values even for MIPS32 kernels, expanding the ASID version field sufficiently that we don't need to worry about overflow & avoiding rare issues with reused ASIDs that have been observed in the wild. - The branch delay slot "emulation" page is now mapped without write permission for the user, preventing its use as a nice location for attacks to execute malicious code from. - Support for ioremap_prot(), primarily to allow gdb or other ptrace users the ability to view their tracee's memory using the same cache coherency attribute. - Optimizations to more cpu_has_* macros, allowing more to be compile-time constant where possible. - Enable building the whole kernel with UBSAN instrumentation. - Enable building the kernel with link-time dead code & data elimination. Platform specific changes include: - The Boston board gains a workaround for DMA prefetching issues with the EG20T Platform Controller Hub that it uses. - Cleanups to Cavium Octeon code removing about 20k lines of redundant code, mostly unused or duplicate register definitions in headers. - defconfig updates for the DECstation machines, including new defconfigs for r4k & 64b machines. - Further work on Loongson 3 support. - DMA fixes for SiByte machines" * tag 'mips_4.21' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: (95 commits) MIPS: math-emu: Write-protect delay slot emulation pages MIPS: Remove struct mm_context_t fp_mode_switching field mips: generate uapi header and system call table files mips: add system call table generation support mips: remove syscall table entries mips: add +1 to __NR_syscalls in uapi header mips: rename scall64-64.S to scall64-n64.S mips: remove unused macros mips: add __NR_syscalls along with __NR_Linux_syscalls MIPS: Expand MIPS32 ASIDs to 64 bits MIPS: OCTEON: delete redundant register definitions MIPS: OCTEON: cvmx_gmxx_inf_mode: use oldest forward compatible definition MIPS: OCTEON: cvmx_mio_fus_dat3: use oldest forward compatible definition MIPS: OCTEON: cvmx_pko_mem_debug8: use oldest forward compatible definition MIPS: OCTEON: octeon-usb: use common gpio_bit definition MIPS: OCTEON: enable all OCTEON drivers in defconfig mips: annotate implicit fall throughs MIPS: Hardcode cpu_has_mips* where target ISA allows MIPS: MT: Remove norps command line parameter MIPS: Only include mmzone.h when CONFIG_NEED_MULTIPLE_NODES=y ...

arm64: expose user PAC bit positions via ptrace

2018-12-13T16:42:46Z

When pointer authentication is in use, data/instruction pointers have a number of PAC bits inserted into them. The number and position of these bits depends on the configured TCR_ELx.TxSZ and whether tagging is enabled. ARMv8.3 allows tagging to differ for instruction and data pointers. For userspace debuggers to unwind the stack and/or to follow pointer chains, they need to be able to remove the PAC bits before attempting to use a pointer. This patch adds a new structure with masks describing the location of the PAC bits in userspace instruction and data pointers (i.e. those addressable via TTBR0), which userspace can query via PTRACE_GETREGSET. By clearing these bits from pointers (and replacing them with the value of bit 55), userspace can acquire the PAC-less versions. This new regset is exposed when the kernel is built with (user) pointer authentication support, and the address authentication feature is enabled. Otherwise, the regset is hidden. Reviewed-by: Richard Henderson Signed-off-by: Mark Rutland Signed-off-by: Kristina Martsenko Cc: Catalin Marinas Cc: Ramana Radhakrishnan Cc: Will Deacon [will: Fix to use vabits_user instead of VA_BITS and rename macro] Signed-off-by: Will Deacon

MIPS: ptrace: introduce NT_MIPS_MSA regset

2018-11-21T05:05:39Z

The current methods for obtaining FP context via ptrace only provide either 32 or 64 bits per data register. With MSA, where vector registers are aliased with scalar FP data registers, those registers are 128 bits wide. Thus a new mechanism is required for userland to access those registers via ptrace. This patch introduces an NT_MIPS_MSA regset which provides, in this order: - The full 128 bits value of each vector register, in native endianness saved as though elements are doubles. That is, the format of each vector register is as would be obtained by saving it to memory using an st.d instruction. - The 32 bit scalar FP implementation register (FIR). - The 32 bit scalar FP control & status register (FCSR). - The 32 bit MSA implementation register (MSAIR). - The 32 bit MSA control & status register (MSACSR). The provision of the FIR & FCSR registers in addition to the MSA equivalents allows scalar FP context to be retrieved as a subset of the context available via this regset. Along with the MSA equivalents they also nicely form the final 128 bit "register" of the regset. Signed-off-by: Paul Burton Patchwork: https://patchwork.linux-mips.org/patch/21180/ Cc: linux-mips@linux-mips.org

MIPS: Add FP_MODE regset support

2018-07-19T20:58:44Z

Define an NT_MIPS_FP_MODE core file note and implement a corresponding regset holding the state handled by PR_SET_FP_MODE and PR_GET_FP_MODE prctl(2) requests. This lets debug software correctly interpret the contents of floating-point general registers both in live debugging and in core files, and also switch floating-point modes of a live process. [paul.burton@mips.com: - Changed NT_MIPS_FP_MODE to 0x801 to match first nibble of NT_MIPS_DSP, which was also changed to avoid a conflict.] Signed-off-by: Maciej W. Rozycki Signed-off-by: Paul Burton Patchwork: https://patchwork.linux-mips.org/patch/19331/ Cc: James Hogan Cc: Ralf Baechle Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org

MIPS: Add DSP ASE regset support

2018-07-19T20:47:51Z

Define an NT_MIPS_DSP core file note type and implement a corresponding regset holding the DSP ASE register context, following the layout of the `mips_dsp_state' structure, except for the DSPControl register stored as a 64-bit rather than 32-bit quantity in a 64-bit note. The lack of DSP ASE register saving to core files can be considered a design flaw with commit e50c0a8fa60d ("Support the MIPS32 / MIPS64 DSP ASE."), leading to an incomplete state being saved. Consequently no DSP ASE regset has been created with commit 7aeb753b5353 ("MIPS: Implement task_user_regset_view."), when regset support was added to the MIPS port. Additionally there is no way for ptrace(2) to correctly access the DSP accumulator registers in n32 processes with the existing interfaces. This is due to 32-bit truncation of data passed with PTRACE_PEEKUSR and PTRACE_POKEUSR requests, which cannot be avoided owing to how the data types for ptrace(3) have been defined. This new NT_MIPS_DSP regset fills the missing interface gap. [paul.burton@mips.com: - Change NT_MIPS_DSP to 0x800 to avoid conflict with NT_VMCOREDD introduced by commit 2724273e8fd0 ("vmcore: add API to collect hardware dump in second kernel"). - Drop stable tag. Whilst I agree the lack of this functionality can be considered a flaw in earlier DSP ASE support, it's still new functionality which doesn't meet up to the requirements set out in Documentation/process/stable-kernel-rules.rst.] Signed-off-by: Maciej W. Rozycki Signed-off-by: Paul Burton References: 7aeb753b5353 ("MIPS: Implement task_user_regset_view.") Patchwork: https://patchwork.linux-mips.org/patch/19330/ Cc: Alexander Viro Cc: James Hogan Cc: Ralf Baechle Cc: linux-fsdevel@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org

vmcore: add API to collect hardware dump in second kernel

2018-05-14T17:46:04Z

The sequence of actions done by device drivers to append their device specific hardware/firmware logs to /proc/vmcore are as follows: 1. During probe (before hardware is initialized), device drivers register to the vmcore module (via vmcore_add_device_dump()), with callback function, along with buffer size and log name needed for firmware/hardware log collection. 2. vmcore module allocates the buffer with requested size. It adds an Elf note and invokes the device driver's registered callback function. 3. Device driver collects all hardware/firmware logs into the buffer and returns control back to vmcore module. Ensure that the device dump buffer size is always aligned to page size so that it can be mmaped. Also, rename alloc_elfnotes_buf() to vmcore_alloc_buf() to make it more generic and reserve NT_VMCOREDD note type to indicate vmcore device dump. Suggested-by: Eric Biederman . Signed-off-by: Rahul Lakkireddy Signed-off-by: Ganesh Goudar Signed-off-by: David S. Miller