<feed xmlns='http://www.w3.org/2005/Atom'>
<title>user/sven/linux.git/include/uapi/rdma, branch v6.6.5</title>
<subtitle>Linux Kernel
</subtitle>
<id>https://git.stealer.net/cgit.cgi/user/sven/linux.git/atom?h=v6.6.5</id>
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<updated>2023-07-30T12:43:00Z</updated>
<entry>
<title>RDMA/irdma: Use HW specific minimum WQ size</title>
<updated>2023-07-30T12:43:00Z</updated>
<author>
<name>Sindhu Devale</name>
<email>sindhu.devale@intel.com</email>
</author>
<published>2023-07-25T15:55:25Z</published>
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<id>urn:sha1:72d422c2465e93d5de622173f04d666cb9854c5f</id>
<content type='text'>
HW GEN1 and GEN2 have different min WQ sizes but they are
currently set to the same value.

Use a gen specific attribute min_hw_wq_size and extend ABI to
pass it to user-space.

Signed-off-by: Sindhu Devale &lt;sindhu.devale@intel.com&gt;
Signed-off-by: Shiraz Saleem &lt;shiraz.saleem@intel.com&gt;
Link: https://lore.kernel.org/r/20230725155525.1081-3-shiraz.saleem@intel.com
Signed-off-by: Leon Romanovsky &lt;leon@kernel.org&gt;
</content>
</entry>
<entry>
<title>RDMA/irdma: Allow accurate reporting on QP max send/recv WR</title>
<updated>2023-07-30T12:43:00Z</updated>
<author>
<name>Sindhu Devale</name>
<email>sindhu.devale@intel.com</email>
</author>
<published>2023-07-25T15:55:24Z</published>
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<id>urn:sha1:3a8498720450174b8db450d3375a04dca81b3534</id>
<content type='text'>
Currently the attribute cap.max_send_wr and cap.max_recv_wr
sent from user-space during create QP are the provider computed
SQ/RQ depth as opposed to raw values passed from application.
This inhibits computation of an accurate value for max_send_wr
and max_recv_wr for this QP in the kernel which matches the value
returned in user create QP. Also these capabilities needs to be
reported from the driver in query QP.

Add support by extending the ABI to allow the raw cap.max_send_wr and
cap.max_recv_wr to be passed from user-space, while keeping compatibility
for the older scheme.

The internal HW depth and shift needed for the WQs needs to be computed
now for both kernel and user-mode QPs. Add new helpers to assist with this:
irdma_uk_calc_depth_shift_sq, irdma_uk_calc_depth_shift_rq and
irdma_uk_calc_depth_shift_wq.

Consolidate all the user mode QP setup into a new function
irdma_setup_umode_qp which keeps it with its counterpart
irdma_setup_kmode_qp.

Signed-off-by: Youvaraj Sagar &lt;youvaraj.sagar@intel.com&gt;
Signed-off-by: Sindhu Devale &lt;sindhu.devale@intel.com&gt;
Signed-off-by: Shiraz Saleem &lt;shiraz.saleem@intel.com&gt;
Link: https://lore.kernel.org/r/20230725155525.1081-2-shiraz.saleem@intel.com
Signed-off-by: Leon Romanovsky &lt;leon@kernel.org&gt;
</content>
</entry>
<entry>
<title>RDMA/bnxt_re: Add a new uapi for driver notification</title>
<updated>2023-07-21T19:15:33Z</updated>
<author>
<name>Chandramohan Akula</name>
<email>chandramohan.akula@broadcom.com</email>
</author>
<published>2023-07-19T05:02:57Z</published>
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<id>urn:sha1:61a8118f60e9dde64be4f3a6e07c15014a8bfbd2</id>
<content type='text'>
Add driver notify uapi for application notifying
the driver about the doorbell FIFO congestion.

Link: https://lore.kernel.org/r/1689742977-9128-8-git-send-email-selvin.xavier@broadcom.com
Signed-off-by: Chandramohan Akula &lt;chandramohan.akula@broadcom.com&gt;
Signed-off-by: Selvin Xavier &lt;selvin.xavier@broadcom.com&gt;
Signed-off-by: Jason Gunthorpe &lt;jgg@nvidia.com&gt;
</content>
</entry>
<entry>
<title>RDMA/bnxt_re: Update alloc_page uapi for pacing</title>
<updated>2023-07-21T19:15:32Z</updated>
<author>
<name>Chandramohan Akula</name>
<email>chandramohan.akula@broadcom.com</email>
</author>
<published>2023-07-19T05:02:55Z</published>
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<id>urn:sha1:ea222485788208cd79bad42d25aae9232b33a934</id>
<content type='text'>
Update the alloc_page uapi functionality for handling the
mapping of doorbell pacing shared page and bar address.

Link: https://lore.kernel.org/r/1689742977-9128-6-git-send-email-selvin.xavier@broadcom.com
Signed-off-by: Chandramohan Akula &lt;chandramohan.akula@broadcom.com&gt;
Signed-off-by: Selvin Xavier &lt;selvin.xavier@broadcom.com&gt;
Signed-off-by: Jason Gunthorpe &lt;jgg@nvidia.com&gt;
</content>
</entry>
<entry>
<title>RDMA/bnxt_re: Enable pacing support for the user apps</title>
<updated>2023-07-21T19:15:32Z</updated>
<author>
<name>Chandramohan Akula</name>
<email>chandramohan.akula@broadcom.com</email>
</author>
<published>2023-07-19T05:02:54Z</published>
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<id>urn:sha1:fa8fad92ddddfc0cfb6fd9e9f645cf53a5ee78a6</id>
<content type='text'>
Report the pacing capability to the user applications.

Link: https://lore.kernel.org/r/1689742977-9128-5-git-send-email-selvin.xavier@broadcom.com
Signed-off-by: Chandramohan Akula &lt;chandramohan.akula@broadcom.com&gt;
Signed-off-by: Selvin Xavier &lt;selvin.xavier@broadcom.com&gt;
Signed-off-by: Jason Gunthorpe &lt;jgg@nvidia.com&gt;
</content>
</entry>
<entry>
<title>RDMA/bnxt_re: Enable low latency push</title>
<updated>2023-06-21T17:13:17Z</updated>
<author>
<name>Selvin Xavier</name>
<email>selvin.xavier@broadcom.com</email>
</author>
<published>2023-06-13T18:12:23Z</published>
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<id>urn:sha1:360da60d6c6edb9740de7a8e6d8969d62ceff956</id>
<content type='text'>
Introduce driver specific uapi functionalites. Added a alloc_page
functionality for user library to allocate specific pages. Currently added
support for allocating write combine pages for push functinality. This
interface shall be extended for other page allocations.

Allocate a WC page using the uapi hook for enabling the low latency push
in Gen P5 adapters for small packets. This is supported only for the user
space QPs.

Link: https://lore.kernel.org/r/1686679943-17117-8-git-send-email-selvin.xavier@broadcom.com
Signed-off-by: Selvin Xavier &lt;selvin.xavier@broadcom.com&gt;
Signed-off-by: Jason Gunthorpe &lt;jgg@nvidia.com&gt;
</content>
</entry>
<entry>
<title>RDMA/efa: Add rdma write capability to device caps</title>
<updated>2023-04-21T22:18:58Z</updated>
<author>
<name>Yonatan Nachum</name>
<email>ynachum@amazon.com</email>
</author>
<published>2023-04-04T15:43:13Z</published>
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<id>urn:sha1:531094dc7164718d28ebb581d729807d7e846363</id>
<content type='text'>
Add rdma write capability that is propagated from the device to rdma-core.
Enable MR creation with remote write permissions according to this device
capability.

Link: https://lore.kernel.org/r/20230404154313.35194-1-ynachum@amazon.com
Reviewed-by: Firas Jahjah &lt;firasj@amazon.com&gt;
Reviewed-by: Michael Margolin &lt;mrgolin@amazon.com&gt;
Signed-off-by: Yonatan Nachum &lt;ynachum@amazon.com&gt;
Signed-off-by: Jason Gunthorpe &lt;jgg@nvidia.com&gt;
</content>
</entry>
<entry>
<title>RDMA/bnxt_re: Add resize_cq support</title>
<updated>2023-03-29T07:03:43Z</updated>
<author>
<name>Selvin Xavier</name>
<email>selvin.xavier@broadcom.com</email>
</author>
<published>2023-03-15T08:16:55Z</published>
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<id>urn:sha1:d54bd5abf4d26e1b6722238f75e36069ea91def9</id>
<content type='text'>
Add resize_cq verb support for user space CQs. Resize operation for
kernel CQs are not supported now.

Driver should free the current CQ only after user library polls
for all the completions and switch to new CQ. So after the resize_cq
is returned from the driver, user library polls for existing completions
and store it as temporary data. Once library reaps all completions in the
current CQ, it invokes the ibv_cmd_poll_cq to inform the driver about
the resize_cq completion. Adding a check for user CQs in driver's
poll_cq and complete the resize operation for user CQs.
Updating uverbs_cmd_mask with poll_cq to support this.

Signed-off-by: Selvin Xavier &lt;selvin.xavier@broadcom.com&gt;
Link: https://lore.kernel.org/r/1678868215-23626-1-git-send-email-selvin.xavier@broadcom.com
Signed-off-by: Leon Romanovsky &lt;leon@kernel.org&gt;
</content>
</entry>
<entry>
<title>RDMA/efa: Add data polling capability feature bit</title>
<updated>2023-03-22T17:41:58Z</updated>
<author>
<name>Yonatan Nachum</name>
<email>ynachum@amazon.com</email>
</author>
<published>2023-02-19T08:13:28Z</published>
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<id>urn:sha1:6dddd93938b3651cfeba7158ac179b4e6d3c1553</id>
<content type='text'>
Add feature bit to existing device caps field. EFA supports data polling
of 128 bytes blocks.

The flag indicates that the NIC guarentees that a 128 byte aligned block
is written in order, ie that observing the last 8 bits of the block mean
the prior 127 bytes are also written.

It is useful for "last data polling" acceleration techniques.

Link: https://lore.kernel.org/r/20230219081328.10419-1-mrgolin@amazon.com
Reviewed-by: Yehuda Yitschak &lt;yehuday@amazon.com&gt;
Reviewed-by: Yossi Leybovich &lt;sleybo@amazon.com&gt;
Signed-off-by: Yonatan Nachum &lt;ynachum@amazon.com&gt;
Signed-off-by: Michael Margolin &lt;mrgolin@amazon.com&gt;
Acked-by: Gal Pressman &lt;gal.pressman@linux.dev&gt;
Signed-off-by: Jason Gunthorpe &lt;jgg@nvidia.com&gt;
</content>
</entry>
<entry>
<title>RDMA/hns: Support cqe inline in user space</title>
<updated>2023-01-09T14:45:28Z</updated>
<author>
<name>Luoyouming</name>
<email>luoyouming@huawei.com</email>
</author>
<published>2022-12-24T10:22:01Z</published>
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<id>urn:sha1:1d91855304c2046115ee10be2c93161d93d5d40d</id>
<content type='text'>
Enable the CQEIE field and configure the CQEIS field of QPC.  And add
compatibility handling.

Link: https://lore.kernel.org/r/20221224102201.3114536-4-xuhaoyue1@hisilicon.com
Signed-off-by: Luoyouming &lt;luoyouming@huawei.com&gt;
Signed-off-by: Haoyue Xu &lt;xuhaoyue1@hisilicon.com&gt;
Signed-off-by: Jason Gunthorpe &lt;jgg@nvidia.com&gt;
</content>
</entry>
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