user/sven/linux.git/scripts/Kbuild.include, branch v6.0-rc2

kbuild: add cmd_and_savecmd macro

2022-06-01T14:07:29Z

Separate out the command execution part of if_changed, as we did for if_changed_dep. This allows us to reuse it in if_changed_rule. define rule_foo $(call cmd_and_savecmd,foo) $(call cmd,bar) endef Signed-off-by: Masahiro Yamada Reviewed-by: Kees Cook Tested-by: Nathan Chancellor Reviewed-by: Nicolas Schier Tested-by: Sedat Dilek # LLVM-14 (x86-64)

kbuild: do not create *.prelink.o for Clang LTO or IBT

2022-05-29T09:39:35Z

When CONFIG_LTO_CLANG=y, additional intermediate *.prelink.o is created for each module. Also, objtool is postponed until LLVM IR is converted to ELF. CONFIG_X86_KERNEL_IBT works in a similar way to postpone objtool until objects are merged together. This commit stops generating *.prelink.o, so the build flow will look similar with/without LTO. The following figures show how the LTO build currently works, and how this commit is changing it. Current build flow ================== [1] single-object module $(LD) $(CC) +objtool $(LD) foo.c --------------------> foo.o -----> foo.prelink.o -----> foo.ko (LLVM IR) (ELF) | (ELF) | foo.mod.o --/ (LLVM IR) [2] multi-object module $(LD) $(CC) $(AR) +objtool $(LD) foo1.c -----> foo1.o -----> foo.o -----> foo.prelink.o -----> foo.ko | (archive) (ELF) | (ELF) foo2.c -----> foo2.o --/ | (LLVM IR) foo.mod.o --/ (LLVM IR) One confusion is that foo.o in multi-object module is an archive despite of its suffix. New build flow ============== [1] single-object module Since there is only one object, there is no need to keep the LLVM IR. Use $(CC)+$(LD) to generate an ELF object in one build rule. When LTO is disabled, $(LD) is unneeded because $(CC) produces an ELF object. $(CC)+$(LD)+objtool $(LD) foo.c ----------------------------> foo.o ---------> foo.ko (ELF) | (ELF) | foo.mod.o --/ (LLVM IR) [2] multi-object module Previously, $(AR) was used to combine LLVM IR files into an archive, but there was no technical reason to do so. Use $(LD) to merge them into a single ELF object. $(LD) $(CC) +objtool $(LD) foo1.c ---------> foo1.o ---------> foo.o ---------> foo.ko | (ELF) | (ELF) foo2.c ---------> foo2.o ----/ | (LLVM IR) foo.mod.o --/ (LLVM IR) Signed-off-by: Masahiro Yamada Reviewed-by: Nicolas Schier Tested-by: Nathan Chancellor Reviewed-by: Sami Tolvanen Tested-by: Sedat Dilek # LLVM-14 (x86-64) Acked-by: Josh Poimboeuf

certs: simplify $(srctree)/ handling and remove config_filename macro

2022-01-08T08:46:35Z

The complex macro, config_filename, was introduced to do: [1] drop double-quotes from the string value [2] add $(srctree)/ prefix in case the file is not found in $(objtree) [3] escape spaces and more [1] will be more generally handled by Kconfig later. As for [2], Kbuild uses VPATH to search for files in $(objtree), $(srctree) in this order. GNU Make can natively handle it. As for [3], converting $(space) to $(space_escape) back and forth looks questionable to me. It is well-known that GNU Make cannot handle file paths with spaces in the first place. Instead of using the complex macro, use $< so it will be expanded to the file path of the key. Remove config_filename, finally. Signed-off-by: Masahiro Yamada

kbuild: warn if FORCE is missing for if_changed(_dep,_rule) and filechk

2021-09-02T23:17:19Z

if_changed, if_changed_dep, and if_changed_rule must have FORCE as a prerequisite so the command line change is detected. Documentation/kbuild/makefiles.rst clearly explains it: Note: It is a typical mistake to forget the FORCE prerequisite. However, not all people follow the document. This mistake occurred again and again, so a compelling force is needed. Show a warning if FORCE is missing in the prerequisite of if_changed and friends. Same for filechk. Signed-off-by: Masahiro Yamada Tested-by: Nicolas Schier

kbuild: macrofy the condition of if_changed and friends

2021-09-02T23:17:19Z

Add a new macro that expands into $(newer-prereqs)$(cmd-check). It makes it easier to add common code for if_changed, if_changed_dep, and if_changed_rule. Signed-off-by: Masahiro Yamada

kbuild: sink stdout from cmd for silent build

2021-05-26T19:01:50Z

When building with 'make -s', no output to stdout should be printed. As Arnd Bergmann reported [1], mkimage shows the detailed information of the generated images. I think this should be suppressed by the 'cmd' macro instead of by individual scripts. Insert 'exec >/dev/null;' in order to redirect stdout to /dev/null for silent builds. [Note about this implementation] 'exec >/dev/null;' may look somewhat tricky, but this has a reason. Appending '>/dev/null' at the end of command line is a common way for redirection, so I first tried this: cmd = @set -e; $(echo-cmd) $(cmd_$(1)) >/dev/null ... but it would not work if $(cmd_$(1)) itself contains a redirection. For example, cmd_wrap in scripts/Makefile.asm-generic redirects the output from the 'echo' command into the target file. It would be expanded into: echo "#include " > $@ >/dev/null Then, the target file gets empty because the string will go to /dev/null instead of $@. Next, I tried this: cmd = @set -e; $(echo-cmd) { $(cmd_$(1)); } >/dev/null The form above would be expanded into: { echo "#include " > $@; } >/dev/null This works as expected. However, it would be a syntax error if $(cmd_$(1)) is empty. When CONFIG_TRIM_UNUSED_KSYMS is disabled, $(call cmd,gen_ksymdeps) in scripts/Makefile.build would be expanded into: set -e; { ; } >/dev/null ..., which causes an syntax error. I also tried this: cmd = @set -e; $(echo-cmd) ( $(cmd_$(1)) ) >/dev/null ... but this causes a syntax error for the same reason. So, finally I adopted: cmd = @set -e; $(echo-cmd) exec >/dev/null; $(cmd_$(1)) [1]: https://lore.kernel.org/lkml/20210514135752.2910387-1-arnd@kernel.org/ Signed-off-by: Masahiro Yamada

kbuild: split cc-option and friends to scripts/Makefile.compiler

2021-04-24T20:09:32Z

scripts/Kbuild.include is included everywhere, but macros such as cc-option are needed by build targets only. For example, when 'make clean' traverses the tree, it does not need to evaluate $(call cc-option,). Split cc-option, ld-option, etc. to scripts/Makefile.compiler, which is only included from the top Makefile and scripts/Makefile.build. Signed-off-by: Masahiro Yamada

kbuild: remove ld-version macro

2021-02-21T23:22:04Z

There is no direct user of ld-version; you can use CONFIG_LD_VERSION if needed. Signed-off-by: Masahiro Yamada Reviewed-by: Nathan Chancellor

kbuild: remove leftover comment for filechk utility

2020-10-20T15:28:53Z

After commit 43fee2b23895 ("kbuild: do not redirect the first prerequisite for filechk"), the rule is no longer automatically passed $< as stdin, so remove the stale comment. Fixes: 43fee2b23895 ("kbuild: do not redirect the first prerequisite for filechk") Signed-off-by: Rasmus Villemoes Signed-off-by: Masahiro Yamada

kbuild: stop filtering out $(GCC_PLUGINS_CFLAGS) from cc-option base

2020-08-09T16:32:59Z

Commit d26e94149276 ("kbuild: no gcc-plugins during cc-option tests") was neeeded because scripts/Makefile.gcc-plugins was too early. This is unneeded by including scripts/Makefile.gcc-plugins last, and being careful to not add cc-option tests after it. Signed-off-by: Masahiro Yamada