user/sven/linux.git/scripts/Makefile.host, branch v5.2

kbuild: remove 'addtree' and 'flags' magic for header search paths

2019-05-18T02:49:57Z

The 'addtree' and 'flags' in scripts/Kbuild.include are so compilecated and ugly. As I mentioned in [1], Kbuild should stop automatic prefixing of header search path options. I fixed up (almost) all Makefiles in the kernel. Now 'addtree' and 'flags' have been removed. Kbuild still caters to add $(srctree)/$(src) and $(objtree)/$(obj) to the header search path for O= building, but never touches extra compiler options from ccflags-y etc. [1]: https://patchwork.kernel.org/patch/9632347/ Signed-off-by: Masahiro Yamada

kbuild: use $(srctree) instead of KBUILD_SRC to check out-of-tree build

2019-04-02T14:28:04Z

KBUILD_SRC was conventionally used for some different purposes: [1] To remember the source tree path [2] As a flag to check if sub-make is already done [3] As a flag to check if Kbuild runs out of tree For [1], we do not need to remember it because the top Makefile can compute it by $(realpath $(dir $(lastword $(MAKEFILE_LIST)))) [2] has been replaced with self-commenting 'sub_make_done'. For [3], we can distinguish in-tree/out-of-tree by comparing $(srctree) and '.' This commit converts [3] to prepare for the KBUILD_SRC removal. Signed-off-by: Masahiro Yamada

kbuild: skip 'addtree' and 'flags' magic for external module build

2019-01-28T00:11:17Z

When building an external module, $(obj) is the absolute path to it. The header search paths from ccflags-y etc. should not be tweaked. Signed-off-by: Masahiro Yamada

kbuild: Rename HOST_LOADLIBES to KBUILD_HOSTLDLIBS

2018-07-17T16:18:05Z

In preparation for enabling command line LDLIBS, re-name HOST_LOADLIBES to KBUILD_HOSTLDLIBS as the internal use only flags. Also rename existing usage to HOSTLDLIBS for consistency. This should not have any visible effects. Signed-off-by: Laura Abbott Signed-off-by: Masahiro Yamada

kbuild: Rename HOSTLDFLAGS to KBUILD_HOSTLDFLAGS

2018-07-17T16:18:05Z

In preparation for enabling command line LDFLAGS, re-name HOSTLDFLAGS to KBUILD_HOSTLDFLAGS as the internal use only flags. This should not have any visible effects. Signed-off-by: Laura Abbott Signed-off-by: Masahiro Yamada

kbuild: Rename HOSTCXXFLAGS to KBUILD_HOSTCXXFLAGS

2018-07-17T16:18:05Z

In preparation for enabling command line CXXFLAGS, re-name HOSTCXXFLAGS to KBUILD_HOSTCXXFLAGS as the internal use only flags. This should not have any visible effects. Signed-off-by: Laura Abbott Signed-off-by: Masahiro Yamada

kbuild: Rename HOSTCFLAGS to KBUILD_HOSTCFLAGS

2018-07-17T16:18:05Z

In preparation for enabling command line CFLAGS, re-name HOSTCFLAGS to KBUILD_HOSTCFLAGS as the internal use only flags. This should not have any visible effects. Signed-off-by: Laura Abbott Signed-off-by: Masahiro Yamada

kbuild: use HOSTLDFLAGS for single .c executables

2018-04-07T10:04:02Z

When compiling executables from a single .c file, the linker is also invoked. Pass the HOSTLDFLAGS like for other linker commands. Signed-off-by: Robin Jarry Cc: Josh Poimboeuf Cc: Ingo Molnar Signed-off-by: Masahiro Yamada

Merge tag 'kbuild-v4.15' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-kbuild

2017-11-18T01:45:29Z

Pull Kbuild updates from Masahiro Yamada: "One of the most remarkable improvements in this cycle is, Kbuild is now able to cache the result of shell commands. Some variables are expensive to compute, for example, $(call cc-option,...) invokes the compiler. It is not efficient to redo this computation every time, even when we are not actually building anything. Kbuild creates a hidden file ".cache.mk" that contains invoked shell commands and their results. The speed-up should be noticeable. Summary: - Fix arch build issues (hexagon, sh) - Clean up various Makefiles and scripts - Fix wrong usage of {CFLAGS,LDFLAGS}_MODULE in arch Makefiles - Cache variables that are expensive to compute - Improve cc-ldopton and ld-option for Clang - Optimize output directory creation" * tag 'kbuild-v4.15' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-kbuild: (30 commits) kbuild: move coccicheck help from scripts/Makefile.help to top Makefile sh: decompressor: add shipped files to .gitignore frv: .gitignore: ignore vmlinux.lds selinux: remove unnecessary assignment to subdir- kbuild: specify FORCE in Makefile.headersinst as .PHONY target kbuild: remove redundant mkdir from ./Kbuild kbuild: optimize object directory creation for incremental build kbuild: create object directories simpler and faster kbuild: filter-out PHONY targets from "targets" kbuild: remove redundant $(wildcard ...) for cmd_files calculation kbuild: create directory for make cache only when necessary sh: select KBUILD_DEFCONFIG depending on ARCH kbuild: fix linker feature test macros when cross compiling with Clang kbuild: shrink .cache.mk when it exceeds 1000 lines kbuild: do not call cc-option before KBUILD_CFLAGS initialization kbuild: Cache a few more calls to the compiler kbuild: Add a cache for generated variables kbuild: add forward declaration of default target to Makefile.asm-generic kbuild: remove KBUILD_SUBDIR_ASFLAGS and KBUILD_SUBDIR_CCFLAGS hexagon/kbuild: replace CFLAGS_MODULE with KBUILD_CFLAGS_MODULE ...

kbuild: create object directories simpler and faster

2017-11-16T00:07:35Z

For the out-of-tree build, scripts/Makefile.build creates output directories, but this operation is not efficient. scripts/Makefile.lib calculates obj-dirs as follows: obj-dirs := $(dir $(multi-objs) $(obj-y)) Please notice $(sort ...) is not used here. Usually the result is as many "./" as objects here. For a lot of duplicated paths, the following command is invoked. _dummy := $(foreach d,$(obj-dirs), $(shell [ -d $(d) ] || mkdir -p $(d))) Then, the costly shell command is run over and over again. I see many points for optimization: [1] Use $(sort ...) to cut down duplicated paths before passing them to system call [2] Use single $(shell ...) instead of repeating it with $(foreach ...) This will reduce forking. [3] We can calculate obj-dirs more simply. Most of objects are already accumulated in $(targets). So, $(dir $(targets)) is fine and more comprehensive. I also removed ugly code in arch/x86/entry/vdso/Makefile. This is now really unnecessary. Signed-off-by: Masahiro Yamada Acked-by: Ingo Molnar Tested-by: Douglas Anderson