user/sven/linux.git/scripts/Makefile.lib, branch v4.17.16

kbuild: replace hardcoded bison in cmd_bison_h with $(YACC)

2018-05-05T01:24:52Z

Commit 73a4f6dbe70a ("kbuild: add LEX and YACC variables") missed to update cmd_bison_h somehow. Signed-off-by: Masahiro Yamada

kbuild: mark $(targets) as .SECONDARY and remove .PRECIOUS markers

2018-04-07T10:04:02Z

GNU Make automatically deletes intermediate files that are updated in a chain of pattern rules. Example 1) %.dtb.o <- %.dtb.S <- %.dtb <- %.dts Example 2) %.o <- %.c <- %.c_shipped A couple of makefiles mark such targets as .PRECIOUS to prevent Make from deleting them, but the correct way is to use .SECONDARY. .SECONDARY Prerequisites of this special target are treated as intermediate files but are never automatically deleted. .PRECIOUS When make is interrupted during execution, it may delete the target file it is updating if the file was modified since make started. If you mark the file as precious, make will never delete the file if interrupted. Both can avoid deletion of intermediate files, but the difference is the behavior when Make is interrupted; .SECONDARY deletes the target, but .PRECIOUS does not. The use of .PRECIOUS is relatively rare since we do not want to keep partially constructed (possibly corrupted) targets. Another difference is that .PRECIOUS works with pattern rules whereas .SECONDARY does not. .PRECIOUS: $(obj)/%.lex.c works, but .SECONDARY: $(obj)/%.lex.c has no effect. However, for the reason above, I do not want to use .PRECIOUS which could cause obscure build breakage. The targets specified as .SECONDARY must be explicit. $(targets) contains all targets that need to include .*.cmd files. So, the intermediates you want to keep are mostly in there. Therefore, mark $(targets) as .SECONDARY. It means primary targets are also marked as .SECONDARY, but I do not see any drawback for this. I replaced some .SECONDARY / .PRECIOUS markers with 'targets'. This will make Kbuild search for non-existing .*.cmd files, but this is not a noticeable performance issue. Signed-off-by: Masahiro Yamada Acked-by: Frank Rowand Acked-by: Ingo Molnar

kbuild: add %.dtb.S and %.dtb to 'targets' automatically

2018-04-07T10:04:02Z

Another common pattern that consists of chained commands is to compile a DTB as binary data into the kernel image or a module. It is used in several places in the source tree. Support it in the core Makefile. $(call if_changed,dt_S_dtb) is more suitable than $(call cmd,dt_S_dtb) in case cmd_dt_S_dtb is changed in the future. Signed-off-by: Masahiro Yamada Acked-by: Frank Rowand

genksyms: generate lexer and parser during build instead of shipping

2018-04-07T10:04:02Z

Now that the kernel build supports flex and bison, remove the _shipped files and generate them during the build instead. There are no more shipped lexer and parser, so I ripped off the rules in scripts/Malefile.lib that were used for REGENERATE_PARSERS. The genksyms parser has ambiguous grammar, which would emit warnings: scripts/genksyms/parse.y: warning: 9 shift/reduce conflicts [-Wconflicts-sr] scripts/genksyms/parse.y: warning: 5 reduce/reduce conflicts [-Wconflicts-rr] They are normally suppressed, but displayed when W=1 is given. Signed-off-by: Masahiro Yamada

Merge tag 'devicetree-for-4.17' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux

2018-04-06T04:03:42Z

Pull DeviceTree updates from Rob Herring: - Sync dtc to upstream version v1.4.6-9-gaadd0b65c987. This adds a bunch more warnings (hidden behind W=1). - Build dtc lexer and parser files instead of using shipped versions. - Rework overlay apply API to take an FDT as input and apply overlays in a single step. - Add a phandle lookup cache. This improves boot time by hundreds of msec on systems with large DT. - Add trivial mcp4017/18/19 potentiometers bindings. - Remove VLA stack usage in DT code. * tag 'devicetree-for-4.17' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (26 commits) of: unittest: fix an error code in of_unittest_apply_overlay() of: unittest: move misplaced function declaration of: unittest: Remove VLA stack usage of: overlay: Fix forgotten reference to of_overlay_apply() of: Documentation: Fix forgotten reference to of_overlay_apply() of: unittest: local return value variable related cleanups of: unittest: remove unneeded local return value variables dt-bindings: trivial: add various mcp4017/18/19 potentiometers of: unittest: fix an error test in of_unittest_overlay_8() of: cache phandle nodes to reduce cost of of_find_node_by_phandle() dt-bindings: rockchip-dw-mshc: use consistent clock names MAINTAINERS: Add linux/of_*.h headers to appropriate subsystems scripts: turn off some new dtc warnings by default scripts/dtc: Update to upstream version v1.4.6-9-gaadd0b65c987 scripts/dtc: generate lexer and parser during build instead of shipping powerpc: boot: add strrchr function of: overlay: do not include path in full_name of added nodes of: unittest: clean up changeset test arm64/efi: Make strrchr() available to the EFI namespace ARM: boot: add strrchr function ...

kbuild: get out of

2018-03-31T03:22:38Z

Since commit 28128c61e08e ("kconfig.h: Include compiler types to avoid missed struct attributes"), pulls in kernel-space headers to unrelated places. Commit 0f9da844d877 ("MIPS: boot: Define __ASSEMBLY__ for its.S build") suppress the build error by defining __ASSEMBLY__, but ITS (i.e. DTS) is not assembly, and should not include in the first place. Looking at arch/s390/tools/Makefile, host programs gen_facilities and gen_opcode_table now pull in as well. The motivation for that commit was to define necessary attributes before any struct is defined. Obviously, this happens only in C. It is enough to include only when compiling C files, and only when compiling kernel space. Move the include to c_flags. Signed-off-by: Masahiro Yamada

kbuild: link $(real-obj-y) instead of $(obj-y) into built-in.a

2018-03-25T17:01:27Z

In Kbuild, Makefiles can add the same object to obj-y multiple times. So, obj-y += foo.o obj-y += foo.o is fine. However, this is not true when the same object is added multiple times via composite objects. For example, obj-y += foo.o bar.o foo-objs := foo-bar-common.o foo-only.o bar-objs := foo-bar-common.o bar-only.o causes build error because two instances of foo-bar-common.o are linked into the vmlinux. Makefiles tend to invent ugly work-around, for example - lib/zstd/Makefile - drivers/net/ethernet/cavium/liquidio/Makefile The technique used in Kbuild to avoid the multiple definition error is to use $(filter $(obj-y), $^). Here, $^ lists the names of all the prerequisites with duplicated names removed. By replacing it with $(filter $(real-obj-y), $^) we can do likewise for composite objects. For built-in objects, we do not need to keep the composite object structure. We can simply expand them, and link $(real-obj-y) to built-in.a. Signed-off-by: Masahiro Yamada

kbuild: rename real-objs-y/m to real-obj-y/m

2018-03-25T17:01:26Z

When I was refactoring Makefiles, I stupidly mistook 'real-obj-y' for 'real-objs-y' over and over again. Finally, I decide to rename it to 'real-obj-y'. This is consistent with 'obj-y', 'subdir-obj-y'. Signed-off-by: Masahiro Yamada

kbuild: move modname and modname-multi close to modname_flags

2018-03-25T17:01:26Z

Just a cosmetic change to put related code close together. Signed-off-by: Masahiro Yamada Reviewed-by: Cao jin

kbuild: simplify modname calculation

2018-03-25T17:01:25Z

modname can be calculated much more simply. If modname-multi is empty, it is a single-used object. So, modname = $(basetarget). Otherwise, modname = $(modname-multi). Signed-off-by: Masahiro Yamada Reviewed-by: Cao jin