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authorChengchang Tang <tangchengchang@huawei.com>2025-10-16 19:40:48 +0800
committerLeon Romanovsky <leon@kernel.org>2025-10-27 05:44:00 -0400
commitc4b67b514af8c2d73c64b36e0cd99e9b26b9ac82 (patch)
tree8af434febb421558992a778bd28168aeea19f789 /drivers/pci/controller/dwc
parentd8713158faad0fd4418cb2f4e432c3876ad53a1f (diff)
RDMA/hns: Fix recv CQ and QP cache affinity
Currently driver enforces affinity between QP cache and send CQ cache, which helps improve the performance of sending, but doesn't set affinity with recv CQ cache, resulting in suboptimal performance of receiving. Use one CQ bank per context to ensure the affinity among QP, send CQ and recv CQ. For kernel ULP, CQ bank is fixed to 0. Fixes: 9e03dbea2b06 ("RDMA/hns: Fix CQ and QP cache affinity") Signed-off-by: Chengchang Tang <tangchengchang@huawei.com> Signed-off-by: Junxian Huang <huangjunxian6@hisilicon.com> Link: https://patch.msgid.link/20251016114051.1963197-2-huangjunxian6@hisilicon.com Signed-off-by: Leon Romanovsky <leon@kernel.org>
Diffstat (limited to 'drivers/pci/controller/dwc')
0 files changed, 0 insertions, 0 deletions