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authorSam Ravnborg <sam@mars.ravnborg.org>2002-12-30 13:09:26 -0600
committerKai Germaschewski <kai@tp1.ruhr-uni-bochum.de>2002-12-30 13:09:26 -0600
commit69964a474a397a844e82d0b49e40f8f6d46eaefa (patch)
treecd94da23c85ab2b713ab5cbc9904329e1ea1d335 /scripts/Makefile.lib
parent527efc055988aedfe42978197b6ab9764405e896 (diff)
kbuild: $(build) and $(clean) macros for make invocation
The former macro $(descend ...) hide for make the fact that a recursively make was invoked. The replacement $(Q)$(MAKE) -f scripts/Makefile.build obj=dir was too verbose. Introduced $(build) and $(clean) allowing the following syntax: $(Q)$(MAKE) $(build)=arch/i386/boot target and similar for clean. Introduced $(build) and $(clean) in general, and for i386 architecture.
Diffstat (limited to 'scripts/Makefile.lib')
-rw-r--r--scripts/Makefile.lib7
1 files changed, 6 insertions, 1 deletions
diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib
index f9136c459970..bc1d58cb93c1 100644
--- a/scripts/Makefile.lib
+++ b/scripts/Makefile.lib
@@ -244,5 +244,10 @@ endef
# $(call descend,<dir>,<target>)
# Recursively call a sub-make in <dir> with target <target>
-
+# Usage is deprecated, because make do not see this as an invocation of make.
descend =$(Q)$(MAKE) -f scripts/Makefile.build obj=$(1) $(2)
+
+# Shorthand for $(Q)$(MAKE) -f scripts/Makefile.build obj=
+# Usage:
+# $(Q)$(MAKE) $(build)=dir
+build := -f scripts/Makefile.build obj