summaryrefslogtreecommitdiff
path: root/drivers/interconnect/qcom/sc7180.h
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/interconnect/qcom/sc7180.h')
-rw-r--r--drivers/interconnect/qcom/sc7180.h149
1 files changed, 0 insertions, 149 deletions
diff --git a/drivers/interconnect/qcom/sc7180.h b/drivers/interconnect/qcom/sc7180.h
deleted file mode 100644
index 2b718922c109..000000000000
--- a/drivers/interconnect/qcom/sc7180.h
+++ /dev/null
@@ -1,149 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * Qualcomm #define SC7180 interconnect IDs
- *
- * Copyright (c) 2020, The Linux Foundation. All rights reserved.
- */
-
-#ifndef __DRIVERS_INTERCONNECT_QCOM_SC7180_H
-#define __DRIVERS_INTERCONNECT_QCOM_SC7180_H
-
-#define SC7180_MASTER_APPSS_PROC 0
-#define SC7180_MASTER_SYS_TCU 1
-#define SC7180_MASTER_NPU_SYS 2
-/* 3 was used by MASTER_IPA_CORE, now represented as RPMh clock */
-#define SC7180_MASTER_LLCC 4
-#define SC7180_MASTER_A1NOC_CFG 5
-#define SC7180_MASTER_A2NOC_CFG 6
-#define SC7180_MASTER_CNOC_DC_NOC 7
-#define SC7180_MASTER_GEM_NOC_CFG 8
-#define SC7180_MASTER_CNOC_MNOC_CFG 9
-#define SC7180_MASTER_NPU_NOC_CFG 10
-#define SC7180_MASTER_QDSS_BAM 11
-#define SC7180_MASTER_QSPI 12
-#define SC7180_MASTER_QUP_0 13
-#define SC7180_MASTER_QUP_1 14
-#define SC7180_MASTER_SNOC_CFG 15
-#define SC7180_MASTER_A1NOC_SNOC 16
-#define SC7180_MASTER_A2NOC_SNOC 17
-#define SC7180_MASTER_COMPUTE_NOC 18
-#define SC7180_MASTER_GEM_NOC_SNOC 19
-#define SC7180_MASTER_MNOC_HF_MEM_NOC 20
-#define SC7180_MASTER_MNOC_SF_MEM_NOC 21
-#define SC7180_MASTER_NPU 22
-#define SC7180_MASTER_SNOC_CNOC 23
-#define SC7180_MASTER_SNOC_GC_MEM_NOC 24
-#define SC7180_MASTER_SNOC_SF_MEM_NOC 25
-#define SC7180_MASTER_QUP_CORE_0 26
-#define SC7180_MASTER_QUP_CORE_1 27
-#define SC7180_MASTER_CAMNOC_HF0 28
-#define SC7180_MASTER_CAMNOC_HF1 29
-#define SC7180_MASTER_CAMNOC_HF0_UNCOMP 30
-#define SC7180_MASTER_CAMNOC_HF1_UNCOMP 31
-#define SC7180_MASTER_CAMNOC_SF 32
-#define SC7180_MASTER_CAMNOC_SF_UNCOMP 33
-#define SC7180_MASTER_CRYPTO 34
-#define SC7180_MASTER_GFX3D 35
-#define SC7180_MASTER_IPA 36
-#define SC7180_MASTER_MDP0 37
-#define SC7180_MASTER_NPU_PROC 38
-#define SC7180_MASTER_PIMEM 39
-#define SC7180_MASTER_ROTATOR 40
-#define SC7180_MASTER_VIDEO_P0 41
-#define SC7180_MASTER_VIDEO_PROC 42
-#define SC7180_MASTER_QDSS_DAP 43
-#define SC7180_MASTER_QDSS_ETR 44
-#define SC7180_MASTER_SDCC_2 45
-#define SC7180_MASTER_UFS_MEM 46
-#define SC7180_MASTER_USB3 47
-#define SC7180_MASTER_EMMC 48
-#define SC7180_SLAVE_EBI1 49
-/* 50 was used by SLAVE_IPA_CORE, now represented as RPMh clock */
-#define SC7180_SLAVE_A1NOC_CFG 51
-#define SC7180_SLAVE_A2NOC_CFG 52
-#define SC7180_SLAVE_AHB2PHY_SOUTH 53
-#define SC7180_SLAVE_AHB2PHY_CENTER 54
-#define SC7180_SLAVE_AOP 55
-#define SC7180_SLAVE_AOSS 56
-#define SC7180_SLAVE_APPSS 57
-#define SC7180_SLAVE_BOOT_ROM 58
-#define SC7180_SLAVE_NPU_CAL_DP0 59
-#define SC7180_SLAVE_CAMERA_CFG 60
-#define SC7180_SLAVE_CAMERA_NRT_THROTTLE_CFG 61
-#define SC7180_SLAVE_CAMERA_RT_THROTTLE_CFG 62
-#define SC7180_SLAVE_CLK_CTL 63
-#define SC7180_SLAVE_NPU_CP 64
-#define SC7180_SLAVE_RBCPR_CX_CFG 65
-#define SC7180_SLAVE_RBCPR_MX_CFG 66
-#define SC7180_SLAVE_CRYPTO_0_CFG 67
-#define SC7180_SLAVE_DCC_CFG 68
-#define SC7180_SLAVE_CNOC_DDRSS 69
-#define SC7180_SLAVE_DISPLAY_CFG 70
-#define SC7180_SLAVE_DISPLAY_RT_THROTTLE_CFG 71
-#define SC7180_SLAVE_DISPLAY_THROTTLE_CFG 72
-#define SC7180_SLAVE_NPU_INT_DMA_BWMON_CFG 73
-#define SC7180_SLAVE_NPU_DPM 74
-#define SC7180_SLAVE_EMMC_CFG 75
-#define SC7180_SLAVE_GEM_NOC_CFG 76
-#define SC7180_SLAVE_GLM 77
-#define SC7180_SLAVE_GFX3D_CFG 78
-#define SC7180_SLAVE_IMEM_CFG 79
-#define SC7180_SLAVE_IPA_CFG 80
-#define SC7180_SLAVE_ISENSE_CFG 81
-#define SC7180_SLAVE_LLCC_CFG 82
-#define SC7180_SLAVE_NPU_LLM_CFG 83
-#define SC7180_SLAVE_MSS_PROC_MS_MPU_CFG 84
-#define SC7180_SLAVE_CNOC_MNOC_CFG 85
-#define SC7180_SLAVE_CNOC_MSS 86
-#define SC7180_SLAVE_NPU_CFG 87
-#define SC7180_SLAVE_NPU_DMA_BWMON_CFG 88
-#define SC7180_SLAVE_NPU_PROC_BWMON_CFG 89
-#define SC7180_SLAVE_PDM 90
-#define SC7180_SLAVE_PIMEM_CFG 91
-#define SC7180_SLAVE_PRNG 92
-#define SC7180_SLAVE_QDSS_CFG 93
-#define SC7180_SLAVE_QM_CFG 94
-#define SC7180_SLAVE_QM_MPU_CFG 95
-#define SC7180_SLAVE_QSPI_0 96
-#define SC7180_SLAVE_QUP_0 97
-#define SC7180_SLAVE_QUP_1 98
-#define SC7180_SLAVE_SDCC_2 99
-#define SC7180_SLAVE_SECURITY 100
-#define SC7180_SLAVE_SNOC_CFG 101
-#define SC7180_SLAVE_NPU_TCM 102
-#define SC7180_SLAVE_TCSR 103
-#define SC7180_SLAVE_TLMM_WEST 104
-#define SC7180_SLAVE_TLMM_NORTH 105
-#define SC7180_SLAVE_TLMM_SOUTH 106
-#define SC7180_SLAVE_UFS_MEM_CFG 107
-#define SC7180_SLAVE_USB3 108
-#define SC7180_SLAVE_VENUS_CFG 109
-#define SC7180_SLAVE_VENUS_THROTTLE_CFG 110
-#define SC7180_SLAVE_VSENSE_CTRL_CFG 111
-#define SC7180_SLAVE_A1NOC_SNOC 112
-#define SC7180_SLAVE_A2NOC_SNOC 113
-#define SC7180_SLAVE_CAMNOC_UNCOMP 114
-#define SC7180_SLAVE_CDSP_GEM_NOC 115
-#define SC7180_SLAVE_SNOC_CNOC 116
-#define SC7180_SLAVE_GEM_NOC_SNOC 117
-#define SC7180_SLAVE_SNOC_GEM_NOC_GC 118
-#define SC7180_SLAVE_SNOC_GEM_NOC_SF 119
-#define SC7180_SLAVE_LLCC 120
-#define SC7180_SLAVE_MNOC_HF_MEM_NOC 121
-#define SC7180_SLAVE_MNOC_SF_MEM_NOC 122
-#define SC7180_SLAVE_NPU_COMPUTE_NOC 123
-#define SC7180_SLAVE_QUP_CORE_0 124
-#define SC7180_SLAVE_QUP_CORE_1 125
-#define SC7180_SLAVE_IMEM 126
-#define SC7180_SLAVE_PIMEM 127
-#define SC7180_SLAVE_SERVICE_A1NOC 128
-#define SC7180_SLAVE_SERVICE_A2NOC 129
-#define SC7180_SLAVE_SERVICE_CNOC 130
-#define SC7180_SLAVE_SERVICE_GEM_NOC 131
-#define SC7180_SLAVE_SERVICE_MNOC 132
-#define SC7180_SLAVE_SERVICE_NPU_NOC 133
-#define SC7180_SLAVE_SERVICE_SNOC 134
-#define SC7180_SLAVE_QDSS_STM 135
-#define SC7180_SLAVE_TCU 136
-
-#endif