summaryrefslogtreecommitdiff
path: root/drivers/interconnect/qcom/sm8350.h
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/interconnect/qcom/sm8350.h')
-rw-r--r--drivers/interconnect/qcom/sm8350.h158
1 files changed, 0 insertions, 158 deletions
diff --git a/drivers/interconnect/qcom/sm8350.h b/drivers/interconnect/qcom/sm8350.h
deleted file mode 100644
index 074c6131ab36..000000000000
--- a/drivers/interconnect/qcom/sm8350.h
+++ /dev/null
@@ -1,158 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * Qualcomm SM8350 interconnect IDs
- *
- * Copyright (c) 2021, Linaro Limited
- */
-
-#ifndef __DRIVERS_INTERCONNECT_QCOM_SM8350_H
-#define __DRIVERS_INTERCONNECT_QCOM_SM8350_H
-
-#define SM8350_MASTER_GPU_TCU 0
-#define SM8350_MASTER_SYS_TCU 1
-#define SM8350_MASTER_APPSS_PROC 2
-#define SM8350_MASTER_LLCC 3
-#define SM8350_MASTER_CNOC_LPASS_AG_NOC 4
-#define SM8350_MASTER_CDSP_NOC_CFG 5
-#define SM8350_MASTER_QDSS_BAM 6
-#define SM8350_MASTER_QSPI_0 7
-#define SM8350_MASTER_QUP_0 8
-#define SM8350_MASTER_QUP_1 9
-#define SM8350_MASTER_QUP_2 10
-#define SM8350_MASTER_A1NOC_CFG 11
-#define SM8350_MASTER_A2NOC_CFG 12
-#define SM8350_MASTER_A1NOC_SNOC 13
-#define SM8350_MASTER_A2NOC_SNOC 14
-#define SM8350_MASTER_CAMNOC_HF 15
-#define SM8350_MASTER_CAMNOC_ICP 16
-#define SM8350_MASTER_CAMNOC_SF 17
-#define SM8350_MASTER_COMPUTE_NOC 18
-#define SM8350_MASTER_CNOC_DC_NOC 19
-#define SM8350_MASTER_GEM_NOC_CFG 20
-#define SM8350_MASTER_GEM_NOC_CNOC 21
-#define SM8350_MASTER_GEM_NOC_PCIE_SNOC 22
-#define SM8350_MASTER_GFX3D 23
-#define SM8350_MASTER_CNOC_MNOC_CFG 24
-#define SM8350_MASTER_MNOC_HF_MEM_NOC 25
-#define SM8350_MASTER_MNOC_SF_MEM_NOC 26
-#define SM8350_MASTER_ANOC_PCIE_GEM_NOC 27
-#define SM8350_MASTER_SNOC_CFG 28
-#define SM8350_MASTER_SNOC_GC_MEM_NOC 29
-#define SM8350_MASTER_SNOC_SF_MEM_NOC 30
-#define SM8350_MASTER_VIDEO_P0 31
-#define SM8350_MASTER_VIDEO_P1 32
-#define SM8350_MASTER_VIDEO_PROC 33
-#define SM8350_MASTER_QUP_CORE_0 34
-#define SM8350_MASTER_QUP_CORE_1 35
-#define SM8350_MASTER_QUP_CORE_2 36
-#define SM8350_MASTER_CRYPTO 37
-#define SM8350_MASTER_IPA 38
-#define SM8350_MASTER_MDP0 39
-#define SM8350_MASTER_MDP1 40
-#define SM8350_MASTER_CDSP_PROC 41
-#define SM8350_MASTER_PIMEM 42
-#define SM8350_MASTER_ROTATOR 43
-#define SM8350_MASTER_GIC 44
-#define SM8350_MASTER_PCIE_0 45
-#define SM8350_MASTER_PCIE_1 46
-#define SM8350_MASTER_QDSS_DAP 47
-#define SM8350_MASTER_QDSS_ETR 48
-#define SM8350_MASTER_SDCC_2 49
-#define SM8350_MASTER_SDCC_4 50
-#define SM8350_MASTER_UFS_CARD 51
-#define SM8350_MASTER_UFS_MEM 52
-#define SM8350_MASTER_USB3_0 53
-#define SM8350_MASTER_USB3_1 54
-#define SM8350_SLAVE_EBI1 55
-#define SM8350_SLAVE_AHB2PHY_SOUTH 56
-#define SM8350_SLAVE_AHB2PHY_NORTH 57
-#define SM8350_SLAVE_AOSS 58
-#define SM8350_SLAVE_APPSS 59
-#define SM8350_SLAVE_CAMERA_CFG 60
-#define SM8350_SLAVE_CLK_CTL 61
-#define SM8350_SLAVE_CDSP_CFG 62
-#define SM8350_SLAVE_RBCPR_CX_CFG 63
-#define SM8350_SLAVE_RBCPR_MMCX_CFG 64
-#define SM8350_SLAVE_RBCPR_MX_CFG 65
-#define SM8350_SLAVE_CRYPTO_0_CFG 66
-#define SM8350_SLAVE_CX_RDPM 67
-#define SM8350_SLAVE_DCC_CFG 68
-#define SM8350_SLAVE_DISPLAY_CFG 69
-#define SM8350_SLAVE_GFX3D_CFG 70
-#define SM8350_SLAVE_HWKM 71
-#define SM8350_SLAVE_IMEM_CFG 72
-#define SM8350_SLAVE_IPA_CFG 73
-#define SM8350_SLAVE_IPC_ROUTER_CFG 74
-#define SM8350_SLAVE_LLCC_CFG 75
-#define SM8350_SLAVE_LPASS 76
-#define SM8350_SLAVE_LPASS_CORE_CFG 77
-#define SM8350_SLAVE_LPASS_LPI_CFG 78
-#define SM8350_SLAVE_LPASS_MPU_CFG 79
-#define SM8350_SLAVE_LPASS_TOP_CFG 80
-#define SM8350_SLAVE_MSS_PROC_MS_MPU_CFG 81
-#define SM8350_SLAVE_MCDMA_MS_MPU_CFG 82
-#define SM8350_SLAVE_CNOC_MSS 83
-#define SM8350_SLAVE_MX_RDPM 84
-#define SM8350_SLAVE_PCIE_0_CFG 85
-#define SM8350_SLAVE_PCIE_1_CFG 86
-#define SM8350_SLAVE_PDM 87
-#define SM8350_SLAVE_PIMEM_CFG 88
-#define SM8350_SLAVE_PKA_WRAPPER_CFG 89
-#define SM8350_SLAVE_PMU_WRAPPER_CFG 90
-#define SM8350_SLAVE_QDSS_CFG 91
-#define SM8350_SLAVE_QSPI_0 92
-#define SM8350_SLAVE_QUP_0 93
-#define SM8350_SLAVE_QUP_1 94
-#define SM8350_SLAVE_QUP_2 95
-#define SM8350_SLAVE_SDCC_2 96
-#define SM8350_SLAVE_SDCC_4 97
-#define SM8350_SLAVE_SECURITY 98
-#define SM8350_SLAVE_SPSS_CFG 99
-#define SM8350_SLAVE_TCSR 100
-#define SM8350_SLAVE_TLMM 101
-#define SM8350_SLAVE_UFS_CARD_CFG 102
-#define SM8350_SLAVE_UFS_MEM_CFG 103
-#define SM8350_SLAVE_USB3_0 104
-#define SM8350_SLAVE_USB3_1 105
-#define SM8350_SLAVE_VENUS_CFG 106
-#define SM8350_SLAVE_VSENSE_CTRL_CFG 107
-#define SM8350_SLAVE_A1NOC_CFG 108
-#define SM8350_SLAVE_A1NOC_SNOC 109
-#define SM8350_SLAVE_A2NOC_CFG 110
-#define SM8350_SLAVE_A2NOC_SNOC 111
-#define SM8350_SLAVE_DDRSS_CFG 112
-#define SM8350_SLAVE_GEM_NOC_CNOC 113
-#define SM8350_SLAVE_GEM_NOC_CFG 114
-#define SM8350_SLAVE_SNOC_GEM_NOC_GC 115
-#define SM8350_SLAVE_SNOC_GEM_NOC_SF 116
-#define SM8350_SLAVE_LLCC 117
-#define SM8350_SLAVE_MNOC_HF_MEM_NOC 118
-#define SM8350_SLAVE_MNOC_SF_MEM_NOC 119
-#define SM8350_SLAVE_CNOC_MNOC_CFG 120
-#define SM8350_SLAVE_CDSP_MEM_NOC 121
-#define SM8350_SLAVE_MEM_NOC_PCIE_SNOC 122
-#define SM8350_SLAVE_ANOC_PCIE_GEM_NOC 123
-#define SM8350_SLAVE_SNOC_CFG 124
-#define SM8350_SLAVE_QUP_CORE_0 125
-#define SM8350_SLAVE_QUP_CORE_1 126
-#define SM8350_SLAVE_QUP_CORE_2 127
-#define SM8350_SLAVE_BOOT_IMEM 128
-#define SM8350_SLAVE_IMEM 129
-#define SM8350_SLAVE_PIMEM 130
-#define SM8350_SLAVE_SERVICE_NSP_NOC 131
-#define SM8350_SLAVE_SERVICE_A1NOC 132
-#define SM8350_SLAVE_SERVICE_A2NOC 133
-#define SM8350_SLAVE_SERVICE_CNOC 134
-#define SM8350_SLAVE_SERVICE_GEM_NOC_1 135
-#define SM8350_SLAVE_SERVICE_MNOC 136
-#define SM8350_SLAVE_SERVICES_LPASS_AML_NOC 137
-#define SM8350_SLAVE_SERVICE_LPASS_AG_NOC 138
-#define SM8350_SLAVE_SERVICE_GEM_NOC_2 139
-#define SM8350_SLAVE_SERVICE_SNOC 140
-#define SM8350_SLAVE_SERVICE_GEM_NOC 141
-#define SM8350_SLAVE_PCIE_0 142
-#define SM8350_SLAVE_PCIE_1 143
-#define SM8350_SLAVE_QDSS_STM 144
-#define SM8350_SLAVE_TCU 145
-
-#endif