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path: root/drivers/remoteproc/qcom_q6v5_pas.c
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Diffstat (limited to 'drivers/remoteproc/qcom_q6v5_pas.c')
-rw-r--r--drivers/remoteproc/qcom_q6v5_pas.c80
1 files changed, 31 insertions, 49 deletions
diff --git a/drivers/remoteproc/qcom_q6v5_pas.c b/drivers/remoteproc/qcom_q6v5_pas.c
index 158bcd6cc85c..52680ac99589 100644
--- a/drivers/remoteproc/qcom_q6v5_pas.c
+++ b/drivers/remoteproc/qcom_q6v5_pas.c
@@ -547,54 +547,38 @@ static void qcom_pas_pds_detach(struct qcom_pas *pas, struct device **pds, size_
static int qcom_pas_alloc_memory_region(struct qcom_pas *pas)
{
- struct reserved_mem *rmem;
- struct device_node *node;
-
- node = of_parse_phandle(pas->dev->of_node, "memory-region", 0);
- if (!node) {
- dev_err(pas->dev, "no memory-region specified\n");
- return -EINVAL;
- }
+ struct resource res;
+ int ret;
- rmem = of_reserved_mem_lookup(node);
- of_node_put(node);
- if (!rmem) {
+ ret = of_reserved_mem_region_to_resource(pas->dev->of_node, 0, &res);
+ if (ret) {
dev_err(pas->dev, "unable to resolve memory-region\n");
- return -EINVAL;
+ return ret;
}
- pas->mem_phys = pas->mem_reloc = rmem->base;
- pas->mem_size = rmem->size;
- pas->mem_region = devm_ioremap_wc(pas->dev, pas->mem_phys, pas->mem_size);
- if (!pas->mem_region) {
- dev_err(pas->dev, "unable to map memory region: %pa+%zx\n",
- &rmem->base, pas->mem_size);
- return -EBUSY;
+ pas->mem_phys = pas->mem_reloc = res.start;
+ pas->mem_size = resource_size(&res);
+ pas->mem_region = devm_ioremap_resource_wc(pas->dev, &res);
+ if (IS_ERR(pas->mem_region)) {
+ dev_err(pas->dev, "unable to map memory region: %pR\n", &res);
+ return PTR_ERR(pas->mem_region);
}
if (!pas->dtb_pas_id)
return 0;
- node = of_parse_phandle(pas->dev->of_node, "memory-region", 1);
- if (!node) {
- dev_err(pas->dev, "no dtb memory-region specified\n");
- return -EINVAL;
- }
-
- rmem = of_reserved_mem_lookup(node);
- of_node_put(node);
- if (!rmem) {
+ ret = of_reserved_mem_region_to_resource(pas->dev->of_node, 1, &res);
+ if (ret) {
dev_err(pas->dev, "unable to resolve dtb memory-region\n");
- return -EINVAL;
+ return ret;
}
- pas->dtb_mem_phys = pas->dtb_mem_reloc = rmem->base;
- pas->dtb_mem_size = rmem->size;
- pas->dtb_mem_region = devm_ioremap_wc(pas->dev, pas->dtb_mem_phys, pas->dtb_mem_size);
- if (!pas->dtb_mem_region) {
- dev_err(pas->dev, "unable to map dtb memory region: %pa+%zx\n",
- &rmem->base, pas->dtb_mem_size);
- return -EBUSY;
+ pas->dtb_mem_phys = pas->dtb_mem_reloc = res.start;
+ pas->dtb_mem_size = resource_size(&res);
+ pas->dtb_mem_region = devm_ioremap_resource_wc(pas->dev, &res);
+ if (IS_ERR(pas->dtb_mem_region)) {
+ dev_err(pas->dev, "unable to map dtb memory region: %pR\n", &res);
+ return PTR_ERR(pas->dtb_mem_region);
}
return 0;
@@ -603,7 +587,6 @@ static int qcom_pas_alloc_memory_region(struct qcom_pas *pas)
static int qcom_pas_assign_memory_region(struct qcom_pas *pas)
{
struct qcom_scm_vmperm perm[MAX_ASSIGN_COUNT];
- struct device_node *node;
unsigned int perm_size;
int offset;
int ret;
@@ -612,17 +595,15 @@ static int qcom_pas_assign_memory_region(struct qcom_pas *pas)
return 0;
for (offset = 0; offset < pas->region_assign_count; ++offset) {
- struct reserved_mem *rmem = NULL;
-
- node = of_parse_phandle(pas->dev->of_node, "memory-region",
- pas->region_assign_idx + offset);
- if (node)
- rmem = of_reserved_mem_lookup(node);
- of_node_put(node);
- if (!rmem) {
+ struct resource res;
+
+ ret = of_reserved_mem_region_to_resource(pas->dev->of_node,
+ pas->region_assign_idx + offset,
+ &res);
+ if (ret) {
dev_err(pas->dev, "unable to resolve shareable memory-region index %d\n",
offset);
- return -EINVAL;
+ return ret;
}
if (pas->region_assign_shared) {
@@ -637,8 +618,8 @@ static int qcom_pas_assign_memory_region(struct qcom_pas *pas)
perm_size = 1;
}
- pas->region_assign_phys[offset] = rmem->base;
- pas->region_assign_size[offset] = rmem->size;
+ pas->region_assign_phys[offset] = res.start;
+ pas->region_assign_size[offset] = resource_size(&res);
pas->region_assign_owners[offset] = BIT(QCOM_SCM_VMID_HLOS);
ret = qcom_scm_assign_mem(pas->region_assign_phys[offset],
@@ -1461,7 +1442,7 @@ static const struct of_device_id qcom_pas_of_match[] = {
{ .compatible = "qcom,milos-wpss-pas", .data = &sc7280_wpss_resource},
{ .compatible = "qcom,msm8226-adsp-pil", .data = &msm8996_adsp_resource},
{ .compatible = "qcom,msm8953-adsp-pil", .data = &msm8996_adsp_resource},
- { .compatible = "qcom,msm8974-adsp-pil", .data = &adsp_resource_init},
+ { .compatible = "qcom,msm8974-adsp-pil", .data = &msm8996_adsp_resource},
{ .compatible = "qcom,msm8996-adsp-pil", .data = &msm8996_adsp_resource},
{ .compatible = "qcom,msm8996-slpi-pil", .data = &msm8996_slpi_resource_init},
{ .compatible = "qcom,msm8998-adsp-pas", .data = &msm8996_adsp_resource},
@@ -1488,6 +1469,7 @@ static const struct of_device_id qcom_pas_of_match[] = {
{ .compatible = "qcom,sc8280xp-nsp0-pas", .data = &sc8280xp_nsp0_resource},
{ .compatible = "qcom,sc8280xp-nsp1-pas", .data = &sc8280xp_nsp1_resource},
{ .compatible = "qcom,sdm660-adsp-pas", .data = &adsp_resource_init},
+ { .compatible = "qcom,sdm660-cdsp-pas", .data = &cdsp_resource_init},
{ .compatible = "qcom,sdm845-adsp-pas", .data = &sdm845_adsp_resource_init},
{ .compatible = "qcom,sdm845-cdsp-pas", .data = &sdm845_cdsp_resource_init},
{ .compatible = "qcom,sdm845-slpi-pas", .data = &sdm845_slpi_resource_init},