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Signed-off-by: David S. Miller <davem@davemloft.net>
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Add a new section called ".data.read_mostly" for data items that are read
frequently and rarely written to like cpumaps etc.
If these maps are placed in the .data section then these frequenly read
items may end up in cachelines with data is is frequently updated. In that
case all processors in an SMP system must needlessly reload the cachelines
again and again containing elements of those frequently used variables.
The ability to share these cachelines will allow each cpu in an SMP system
to keep local copies of those shared cachelines thereby optimizing
performance.
Signed-off-by: Alok N Kataria <alokk@calsoftinc.com>
Signed-off-by: Shobhit Dayal <shobhit@calsoftinc.com>
Signed-off-by: Christoph Lameter <christoph@scalex86.org>
Signed-off-by: Shai Fultheim <shai@scalex86.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
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We put ____cacheline_aligned things in their own section, simply
because we waste less space that way. Otherwise we end up padding
innocent variables to the next cacheline to get the required
alignment.
There's no reason not to do this in modules, too.
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ALIGN() currently has global scope in <linux/cache.h>. This causes a
compilation error in the defxx driver.
Move ALIGN() to <linux/kernel.h> and change the defxx driver to use the
generic macro in place of its own.
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zone->lock and zone->lru_lock are two of the hottest locks in the
kernel. Their usage patterns are quite independent. And they have
just been put into the same structure. It is essential that they not
fall into the same cacheline.
That could be fixed by padding with L1_CACHE_BYTES. But the problem
with this is that a kernel which was configured for (say) a PIII will
perform poorly on SMP PIV. This will cause problems for kernel
vendors. For example, RH currently ship PII and Athlon binaries. To
get best SMP performance they will end up needing to ship a lot of
differently configured kernels.
To solve this we need to know, at compile time, the maximum L1 size
which this kernel will ever run on.
This patch adds L1_CACHE_SHIFT_MAX to every architecture's cache.h.
Of course it'll break when newer chips come out with increased
cacheline sizes. Better suggestions are welcome.
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This is the Richard Henderson-approved, cleaner, brighter per-cpu patch.
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- Patrick Mochel: driver model infrastructure, part 1
- Jens Axboe: more bio fixes, cleanups
- Andrew Morton: release locking fixes
- Al Viro: superblock/mount handling
- Kai Germaschewski: AVM Fritz!Card ISDN driver
- Christoph Hellwig: make cramfs SMP-safe.
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- Neil Brown: md cleanups/fixes
- Andrew Morton: console locking merge
- Andrea Arkangeli: major VM merge
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